commit cb37e13fa7496848d184589c7e71bf0bdea54eda
author Akira Hatanaka <ahatanaka@mips.com> Tue Jul 31 23:41:32 2012 +0000
committer Akira Hatanaka <ahatanaka@mips.com> Tue Jul 31 23:41:32 2012 +0000
tree 4cdbb36d9cfb295975204b3cca09e98e2b1126fa
parent 1811b4faad9fd1496bde1d09bd336f9d9902dd78

Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo and
MipsSERegisterInfo.

llvm-svn: 161092

llvm/lib/Target/Mips/MipsInstrInfo.h

diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.h b/llvm/lib/Target/Mips/MipsInstrInfo.h
index 2e41f4a..51fedc4 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.h
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.h
@@ -28,7 +28,6 @@
 class MipsInstrInfo : public MipsGenInstrInfo {
 protected:
   MipsTargetMachine &TM;
-  const MipsRegisterInfo RI;
   unsigned UncondBrOpc;
 
 public:
@@ -63,7 +62,7 @@
   /// such, whenever a client has an instance of instruction info, it should
   /// always be able to get register info as well (through this method).
   ///
-  virtual const MipsRegisterInfo &getRegisterInfo() const;
+  virtual const MipsRegisterInfo &getRegisterInfo() const = 0;
 
   virtual unsigned GetOppositeBranchOpc(unsigned Opc) const = 0;