[AArch64] Bail even earlier if the instructions modifieds the base register. NFC.
llvm-svn: 260274
diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index f38dee9..a283bc9 100644
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -1151,11 +1151,6 @@
if (IsNarrowStore && Reg != AArch64::WZR)
return E;
- // Early exit if the first instruction modifies the base register.
- // e.g., ldr x0, [x0]
- if (FirstMI->modifiesRegister(BaseReg, TRI))
- return E;
-
// Early exit if the offset is not possible to match. (6 bits of positive
// range, plus allow an extra one in case we find a later insn that matches
// with Offset-1)
@@ -1560,6 +1555,12 @@
if (!getLdStOffsetOp(MI).isImm())
return false;
+ // Can't merge/pair if the instruction modifies the base register.
+ // e.g., ldr x0, [x0]
+ unsigned BaseReg = getLdStBaseOp(MI).getReg();
+ if (MI->modifiesRegister(BaseReg, TRI))
+ return false;
+
// Check if this load/store has a hint to avoid pair formation.
// MachineMemOperands hints are set by the AArch64StorePairSuppress pass.
if (TII->isLdStPairSuppressed(MI))