Teach the DAG combiner to turn chains of FADDs (x+x+x+x+...) into FMULs by constants. This is only enabled in unsafe FP math mode, since it does not preserve rounding effects for all such constants.
llvm-svn: 162956
diff --git a/llvm/test/CodeGen/X86/fp-fast.ll b/llvm/test/CodeGen/X86/fp-fast.ll
new file mode 100644
index 0000000..61f59b4
--- /dev/null
+++ b/llvm/test/CodeGen/X86/fp-fast.ll
@@ -0,0 +1,37 @@
+; RUN: llc -march=x86-64 -mtriple=x86_64-apple-darwin -enable-unsafe-fp-math < %s | FileCheck %s
+
+; CHECK: test1
+define float @test1(float %a) {
+; CHECK-NOT: vaddss
+; CHECK: vmulss
+; CHECK-NOT: vaddss
+; CHECK: ret
+ %t1 = fadd float %a, %a
+ %r = fadd float %t1, %t1
+ ret float %r
+}
+
+; CHECK: test2
+define float @test2(float %a) {
+; CHECK-NOT: vaddss
+; CHECK: vmulss
+; CHECK-NOT: vaddss
+; CHECK: ret
+ %t1 = fmul float 4.0, %a
+ %t2 = fadd float %a, %a
+ %r = fadd float %t1, %t2
+ ret float %r
+}
+
+; CHECK: test3
+define float @test3(float %a) {
+; CHECK-NOT: vaddss
+; CHECK: vxorps
+; CHECK-NOT: vaddss
+; CHECK: ret
+ %t1 = fmul float 2.0, %a
+ %t2 = fadd float %a, %a
+ %r = fsub float %t1, %t2
+ ret float %r
+}
+