Predicate encoding should be withing {}s. And general cleanup.
llvm-svn: 120361
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index d2407c6..92b7129 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -1177,19 +1177,17 @@
// LEApcrel - Load a pc-relative address into a register without offending the
// assembler.
-let neverHasSideEffects = 1 in {
-let isReMaterializable = 1 in
+let neverHasSideEffects = 1, isReMaterializable = 1 in
// FIXME: We want one cannonical LEApcrel instruction and to express one or
// both of these as pseudo-instructions that get expanded to it.
def LEApcrel : AXI1<0, (outs GPR:$Rd), (ins i32imm:$label, pred:$p),
MiscFrm, IIC_iALUi,
- "adr$p\t$Rd, #$label", []>;
+ "adr${p}\t$Rd, #$label", []>;
-} // neverHasSideEffects
def LEApcrelJT : AXI1<0b0100, (outs GPR:$Rd),
(ins i32imm:$label, nohash_imm:$id, pred:$p),
MiscFrm, IIC_iALUi,
- "adr$p\t$Rd, #${label}_${id}", []> {
+ "adr${p}\t$Rd, #${label}_${id}", []> {
bits<4> p;
bits<4> Rd;
let Inst{31-28} = p;
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index 9ae8a2b..4a2a199 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -1240,13 +1240,11 @@
// tLEApcrel - Load a pc-relative address into a register without offending the
// assembler.
-let neverHasSideEffects = 1 in {
-let isReMaterializable = 1 in
+let neverHasSideEffects = 1, isReMaterializable = 1 in
def tLEApcrel : T1I<(outs tGPR:$dst), (ins i32imm:$label, pred:$p), IIC_iALUi,
"adr${p}\t$dst, #$label", []>,
T1Encoding<{1,0,1,0,0,?}>; // A6.2 & A8.6.10
-} // neverHasSideEffects
def tLEApcrelJT : T1I<(outs tGPR:$dst),
(ins i32imm:$label, nohash_imm:$id, pred:$p),
IIC_iALUi, "adr${p}\t$dst, #${label}_${id}", []>,