- Two minor improvements to the MachineInstr class to reduce footprint and
overhead: Merge 3 parallel vectors into 1, change regsUsed hash_set to be a
bitvector. Sped up LLC a little less than 10% in a debug build!
llvm-svn: 4261
diff --git a/llvm/lib/Target/Sparc/SparcRegInfo.cpp b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
index d7b20c0..65539cf 100644
--- a/llvm/lib/Target/Sparc/SparcRegInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
@@ -663,7 +663,7 @@
{
isArgInReg = true;
UniArgReg = (unsigned) UniArgRegOrNone;
- CallMI->getRegsUsed().insert(UniArgReg); // mark the reg as used
+ CallMI->insertUsedReg(UniArgReg); // mark the reg as used
}
if (LR->hasColor()) {
@@ -788,7 +788,7 @@
UniRetReg = getUnifiedRegNum(RegClassID, CorrectCol);
// Mark the register as used by this instruction
- CallMI->getRegsUsed().insert(UniRetReg);
+ CallMI->insertUsedReg(UniRetReg);
// if the LR received the correct color, NOTHING to do
recvCorrectColor = RetValLR->hasColor()? RetValLR->getColor() == CorrectCol
@@ -1026,7 +1026,7 @@
unsigned UniRetReg = getUnifiedRegNum(RegClassID, CorrectCol);
// Mark the register as used by this instruction
- RetMI->getRegsUsed().insert(UniRetReg);
+ RetMI->insertUsedReg(UniRetReg);
// if the LR received the correct color, NOTHING to do
@@ -1433,7 +1433,7 @@
scratchReg = PRA.getUsableUniRegAtMI(scratchRegType, &LVSetBef,
CallMI, AdIBef, AdIAft);
assert(scratchReg != getInvalidRegNum());
- CallMI->getRegsUsed().insert(scratchReg);
+ CallMI->insertUsedReg(scratchReg);
}
if (AdIBef.size() > 0)
@@ -1461,7 +1461,7 @@
scratchReg = PRA.getUsableUniRegAtMI(scratchRegType, &LVSetAft,
CallMI, AdIBef, AdIAft);
assert(scratchReg != getInvalidRegNum());
- CallMI->getRegsUsed().insert(scratchReg);
+ CallMI->insertUsedReg(scratchReg);
}
if (AdIBef.size() > 0)