commit cee607e4144e6391472e04235479969d9b0408a2
author Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> Wed Apr 24 17:03:15 2019 +0000
committer Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> Wed Apr 24 17:03:15 2019 +0000
tree c8d40338463d9de3eeee008a50bb8e408cac584b
parent c60a4099a15ad83b19e5389284e1186a7dddd591

[AMDGPU] Add gfx1010 target definitions

Differential Revision: https://reviews.llvm.org/D61041

llvm-svn: 359113

llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h

diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h
index 8efe6f6..2d7857e 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h
@@ -82,6 +82,9 @@
 COMPPGM1(enable_dx10_clamp,               compute_pgm_rsrc1_dx10_clamp,     DX10_CLAMP),
 COMPPGM1(debug_mode,                      compute_pgm_rsrc1_debug_mode,     DEBUG_MODE),
 COMPPGM1(enable_ieee_mode,                compute_pgm_rsrc1_ieee_mode,      IEEE_MODE),
+COMPPGM1(enable_wgp_mode,                 compute_pgm_rsrc1_wgp_mode,       WGP_MODE),
+COMPPGM1(enable_mem_ordered,              compute_pgm_rsrc1_mem_ordered,    MEM_ORDERED),
+COMPPGM1(enable_fwd_progress,             compute_pgm_rsrc1_fwd_progress,   FWD_PROGRESS),
 // TODO: bulky
 // TODO: cdbg_user
 COMPPGM2(enable_sgpr_private_segment_wave_byte_offset, compute_pgm_rsrc2_scratch_en, SCRATCH_EN),