commit cf8827a282e6e133d7a153673b1c05c58817d604
author Dan Gohman <gohman@apple.com> Tue Jan 29 12:43:50 2008 +0000
committer Dan Gohman <gohman@apple.com> Tue Jan 29 12:43:50 2008 +0000
tree 72442e89a15d81d56e0a978a95c33ff30f345523
parent d63d9feadd1003abb400a28d1ac640ffec6f4301

Fix a typo in a comment.

llvm-svn: 46513

llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 5d6b1a2..48bc3cd 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -1386,7 +1386,7 @@
           if (!SuccSU->Node || !SuccSU->Node->isTargetOpcode())
             continue;
           // Don't constrain nodes with physical register defs if the
-          // predecessor can cloober them.
+          // predecessor can clobber them.
           if (SuccSU->hasPhysRegDefs) {
             if (canClobberPhysRegDefs(SuccSU, SU, TII, MRI))
               continue;