commit d05a1a2ade1ba9e865f8bc976262a161f4fd7edc
author Dale Johannesen <dalej@apple.com> Tue Mar 20 21:35:06 2007 +0000
committer Dale Johannesen <dalej@apple.com> Tue Mar 20 21:35:06 2007 +0000
tree 6b622e926d056be4cd29d145d0ee44e10f41343a
parent eb5d241d00dde96b1aa95d3fea2d5e0c11dea29e

maintain LiveIn when splitting blocks (register scavenging needs it)

llvm-svn: 35226

llvm/include/llvm/CodeGen/RegisterScavenging.h

diff --git a/llvm/include/llvm/CodeGen/RegisterScavenging.h b/llvm/include/llvm/CodeGen/RegisterScavenging.h
index 3836002..f66cf15 100644
--- a/llvm/include/llvm/CodeGen/RegisterScavenging.h
+++ b/llvm/include/llvm/CodeGen/RegisterScavenging.h
@@ -91,6 +91,9 @@
   bool isUsed(unsigned Reg) const   { return !RegStates[Reg]; }
   bool isUnused(unsigned Reg) const { return RegStates[Reg]; }
 
+  /// getRegsUsed - return all registers currently in use in used.
+  void getRegsUsed(BitVector &used, bool includeReserved);
+
   /// setUsed / setUnused - Mark the state of one or a number of registers.
   ///
   void setUsed(unsigned Reg)     { RegStates.reset(Reg); }

llvm/lib/CodeGen/BranchFolding.cpp

diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp
index d6bedb8..1f5d675 100644
--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -21,8 +21,10 @@
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineJumpTableInfo.h"
+#include "llvm/CodeGen/RegisterScavenging.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/MRegisterInfo.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/ADT/Statistic.h"
@@ -49,7 +51,9 @@
                                  MachineBasicBlock *NewDest);
     MachineBasicBlock *SplitMBBAt(MachineBasicBlock &CurMBB,
                                   MachineBasicBlock::iterator BBI1);
-        
+
+    const MRegisterInfo *RegInfo;
+    RegScavenger *RS;
     // Branch optzn.
     bool OptimizeBranches(MachineFunction &MF);
     void OptimizeBlock(MachineBasicBlock *MBB);
@@ -95,6 +99,9 @@
   TII = MF.getTarget().getInstrInfo();
   if (!TII) return false;
 
+  RegInfo = MF.getTarget().getRegisterInfo();
+  RS = RegInfo->requiresRegisterScavenging(MF) ? new RegScavenger() : NULL;
+
   MMI = getAnalysisToUpdate<MachineModuleInfo>();
   
   bool EverMadeChange = false;
@@ -153,6 +160,7 @@
       }
   }
   
+  delete RS;
   return EverMadeChange;
 }
 
@@ -280,6 +288,19 @@
   
   // Splice the code over.
   NewMBB->splice(NewMBB->end(), &CurMBB, BBI1, CurMBB.end());
+
+  // For targets that use the register scavenger, we must maintain LiveIns.
+  if (RS) {
+    RS->enterBasicBlock(&CurMBB);
+    if (!CurMBB.empty())
+      RS->forward(prior(CurMBB.end()));
+    BitVector RegsLiveAtExit(RegInfo->getNumRegs());
+    RS->getRegsUsed(RegsLiveAtExit, false);
+    for (unsigned int i=0, e=RegInfo->getNumRegs(); i!=e; i++)
+      if (RegsLiveAtExit[i])
+        NewMBB->addLiveIn(i);
+  }
+
   return NewMBB;
 }
 

llvm/lib/CodeGen/RegisterScavenging.cpp

diff --git a/llvm/lib/CodeGen/RegisterScavenging.cpp b/llvm/lib/CodeGen/RegisterScavenging.cpp
index d73dd3d..e5729ab 100644
--- a/llvm/lib/CodeGen/RegisterScavenging.cpp
+++ b/llvm/lib/CodeGen/RegisterScavenging.cpp
@@ -180,6 +180,13 @@
   setUsed(ChangedRegs);
 }
 
+void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) {
+  if (includeReserved)
+    used = RegStates;
+  else
+    used = RegStates & ~ReservedRegs;
+}
+
 /// CreateRegClassMask - Set the bits that represent the registers in the
 /// TargetRegisterClass.
 static void CreateRegClassMask(const TargetRegisterClass *RC, BitVector &Mask) {