Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
llvm-svn: 186280
diff --git a/llvm/test/CodeGen/SystemZ/int-add-02.ll b/llvm/test/CodeGen/SystemZ/int-add-02.ll
index bc434a6..0d4c8ce 100644
--- a/llvm/test/CodeGen/SystemZ/int-add-02.ll
+++ b/llvm/test/CodeGen/SystemZ/int-add-02.ll
@@ -6,7 +6,7 @@
; Check AR.
define i32 @f1(i32 %a, i32 %b) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK: ar %r2, %r3
; CHECK: br %r14
%add = add i32 %a, %b
@@ -15,7 +15,7 @@
; Check the low end of the A range.
define i32 @f2(i32 %a, i32 *%src) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
; CHECK: a %r2, 0(%r3)
; CHECK: br %r14
%b = load i32 *%src
@@ -25,7 +25,7 @@
; Check the high end of the aligned A range.
define i32 @f3(i32 %a, i32 *%src) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
; CHECK: a %r2, 4092(%r3)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 1023
@@ -36,7 +36,7 @@
; Check the next word up, which should use AY instead of A.
define i32 @f4(i32 %a, i32 *%src) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
; CHECK: ay %r2, 4096(%r3)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 1024
@@ -47,7 +47,7 @@
; Check the high end of the aligned AY range.
define i32 @f5(i32 %a, i32 *%src) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
; CHECK: ay %r2, 524284(%r3)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 131071
@@ -59,7 +59,7 @@
; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK.
define i32 @f6(i32 %a, i32 *%src) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
; CHECK: agfi %r3, 524288
; CHECK: a %r2, 0(%r3)
; CHECK: br %r14
@@ -71,7 +71,7 @@
; Check the high end of the negative aligned AY range.
define i32 @f7(i32 %a, i32 *%src) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
; CHECK: ay %r2, -4(%r3)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 -1
@@ -82,7 +82,7 @@
; Check the low end of the AY range.
define i32 @f8(i32 %a, i32 *%src) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
; CHECK: ay %r2, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 -131072
@@ -94,7 +94,7 @@
; Check the next word down, which needs separate address logic.
; Other sequences besides this one would be OK.
define i32 @f9(i32 %a, i32 *%src) {
-; CHECK: f9:
+; CHECK-LABEL: f9:
; CHECK: agfi %r3, -524292
; CHECK: a %r2, 0(%r3)
; CHECK: br %r14
@@ -106,7 +106,7 @@
; Check that A allows an index.
define i32 @f10(i32 %a, i64 %src, i64 %index) {
-; CHECK: f10:
+; CHECK-LABEL: f10:
; CHECK: a %r2, 4092({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
%add1 = add i64 %src, %index
@@ -119,7 +119,7 @@
; Check that AY allows an index.
define i32 @f11(i32 %a, i64 %src, i64 %index) {
-; CHECK: f11:
+; CHECK-LABEL: f11:
; CHECK: ay %r2, 4096({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
%add1 = add i64 %src, %index
@@ -132,7 +132,7 @@
; Check that additions of spilled values can use A rather than AR.
define i32 @f12(i32 *%ptr0) {
-; CHECK: f12:
+; CHECK-LABEL: f12:
; CHECK: brasl %r14, foo@PLT
; CHECK: a %r2, 16{{[04]}}(%r15)
; CHECK: br %r14