Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
llvm-svn: 186280
diff --git a/llvm/test/CodeGen/SystemZ/int-conv-09.ll b/llvm/test/CodeGen/SystemZ/int-conv-09.ll
index ab6c463..db4c333 100644
--- a/llvm/test/CodeGen/SystemZ/int-conv-09.ll
+++ b/llvm/test/CodeGen/SystemZ/int-conv-09.ll
@@ -4,7 +4,7 @@
; Test register extension, starting with an i32.
define i64 @f1(i32 %a) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK: lgfr %r2, %r2
; CHECK: br %r14
%ext = sext i32 %a to i64
@@ -13,7 +13,7 @@
; ...and again with an i64.
define i64 @f2(i64 %a) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
; CHECK: lgfr %r2, %r2
; CHECK: br %r14
%word = trunc i64 %a to i32
@@ -23,7 +23,7 @@
; Check LGF with no displacement.
define i64 @f3(i32 *%src) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
; CHECK: lgf %r2, 0(%r2)
; CHECK: br %r14
%word = load i32 *%src
@@ -33,7 +33,7 @@
; Check the high end of the LGF range.
define i64 @f4(i32 *%src) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
; CHECK: lgf %r2, 524284(%r2)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 131071
@@ -45,7 +45,7 @@
; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f5(i32 *%src) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
; CHECK: agfi %r2, 524288
; CHECK: lgf %r2, 0(%r2)
; CHECK: br %r14
@@ -57,7 +57,7 @@
; Check the high end of the negative LGF range.
define i64 @f6(i32 *%src) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
; CHECK: lgf %r2, -4(%r2)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 -1
@@ -68,7 +68,7 @@
; Check the low end of the LGF range.
define i64 @f7(i32 *%src) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
; CHECK: lgf %r2, -524288(%r2)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 -131072
@@ -80,7 +80,7 @@
; Check the next word down, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f8(i32 *%src) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
; CHECK: agfi %r2, -524292
; CHECK: lgf %r2, 0(%r2)
; CHECK: br %r14
@@ -92,7 +92,7 @@
; Check that LGF allows an index.
define i64 @f9(i64 %src, i64 %index) {
-; CHECK: f9:
+; CHECK-LABEL: f9:
; CHECK: lgf %r2, 524287(%r3,%r2)
; CHECK: br %r14
%add1 = add i64 %src, %index
@@ -106,7 +106,7 @@
; Test a case where we spill the source of at least one LGFR. We want
; to use LGF if possible.
define void @f10(i64 *%ptr1, i32 *%ptr2) {
-; CHECK: f10:
+; CHECK-LABEL: f10:
; CHECK: lgf {{%r[0-9]+}}, 16{{[04]}}(%r15)
; CHECK: br %r14
%val0 = load volatile i32 *%ptr2