| commit | d2f4c77800410b06a089ae778f51fec4d96efc68 | [log] [tgz] |
|---|---|---|
| author | Matthias Braun <matze@braunis.de> | Wed Nov 19 19:46:15 2014 +0000 |
| committer | Matthias Braun <matze@braunis.de> | Wed Nov 19 19:46:15 2014 +0000 |
| tree | 340a45501fa922fce5183b3ec4de30ac5c52af7a | |
| parent | 47760d9667f8213bca7b97e3f329c4d3ba3a558a [diff] [blame] |
Add a print and verify pass after the RegisterCoalescer llvm-svn: 222381
diff --git a/llvm/lib/CodeGen/Passes.cpp b/llvm/lib/CodeGen/Passes.cpp index 644cc97..ec71d86 100644 --- a/llvm/lib/CodeGen/Passes.cpp +++ b/llvm/lib/CodeGen/Passes.cpp
@@ -732,6 +732,7 @@ addPass(&TwoAddressInstructionPassID); addPass(&RegisterCoalescerID); + printAndVerify("After Register Coalescing"); // PreRA instruction scheduling. if (addPass(&MachineSchedulerID))