Rename DEBUG macro to LLVM_DEBUG.
The DEBUG() macro is very generic so it might clash with other projects.
The renaming was done as follows:
- git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g'
- git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM
- Manual change to APInt
- Manually chage DOCS as regex doesn't match it.
In the transition period the DEBUG() macro is still present and aliased
to the LLVM_DEBUG() one.
Differential Revision: https://reviews.llvm.org/D43624
llvm-svn: 332240
diff --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
index 6d9c782..29c044b 100644
--- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
@@ -217,7 +217,7 @@
NodeSet Visited, Defs;
const auto &P = LV->getAllReachingDefsRec(UR, UN, Visited, Defs);
if (!P.second) {
- DEBUG({
+ LLVM_DEBUG({
dbgs() << "*** Unable to collect all reaching defs for use ***\n"
<< PrintNode<UseNode*>(UN, *DFG) << '\n'
<< "The program's complexity may exceed the limits.\n";
@@ -226,7 +226,7 @@
}
const auto &ReachingDefs = P.first;
if (ReachingDefs.size() > 1) {
- DEBUG({
+ LLVM_DEBUG({
dbgs() << "*** Multiple Reaching Defs found!!! ***\n";
for (auto DI : ReachingDefs) {
NodeAddr<UseNode *> DA = DFG->addr<UseNode *>(DI);
@@ -244,15 +244,15 @@
void HexagonOptAddrMode::getAllRealUses(NodeAddr<StmtNode *> SA,
NodeList &UNodeList) {
for (NodeAddr<DefNode *> DA : SA.Addr->members_if(DFG->IsDef, *DFG)) {
- DEBUG(dbgs() << "\t\t[DefNode]: " << Print<NodeAddr<DefNode *>>(DA, *DFG)
- << "\n");
+ LLVM_DEBUG(dbgs() << "\t\t[DefNode]: "
+ << Print<NodeAddr<DefNode *>>(DA, *DFG) << "\n");
RegisterRef DR = DFG->getPRI().normalize(DA.Addr->getRegRef(*DFG));
auto UseSet = LV->getAllReachedUses(DR, DA);
for (auto UI : UseSet) {
NodeAddr<UseNode *> UA = DFG->addr<UseNode *>(UI);
- DEBUG({
+ LLVM_DEBUG({
NodeAddr<StmtNode *> TempIA = UA.Addr->getOwner(*DFG);
dbgs() << "\t\t\t[Reached Use]: "
<< Print<NodeAddr<InstrNode *>>(TempIA, *DFG) << "\n";
@@ -262,8 +262,8 @@
NodeAddr<PhiNode *> PA = UA.Addr->getOwner(*DFG);
NodeId id = PA.Id;
const Liveness::RefMap &phiUse = LV->getRealUses(id);
- DEBUG(dbgs() << "\t\t\t\tphi real Uses"
- << Print<Liveness::RefMap>(phiUse, *DFG) << "\n");
+ LLVM_DEBUG(dbgs() << "\t\t\t\tphi real Uses"
+ << Print<Liveness::RefMap>(phiUse, *DFG) << "\n");
if (!phiUse.empty()) {
for (auto I : phiUse) {
if (!DFG->getPRI().alias(RegisterRef(I.first), DR))
@@ -306,7 +306,8 @@
NodeAddr<RefNode*> AA = LV->getNearestAliasedRef(LRExtRR, IA);
if ((DFG->IsDef(AA) && AA.Id != LRExtRegRD) ||
AA.Addr->getReachingDef() != LRExtRegRD) {
- DEBUG(dbgs() << "isSafeToExtLR: Returning false; another reaching def\n");
+ LLVM_DEBUG(
+ dbgs() << "isSafeToExtLR: Returning false; another reaching def\n");
return false;
}
@@ -396,8 +397,8 @@
NodeAddr<StmtNode *> OwnerN = UseN.Addr->getOwner(*DFG);
MachineInstr *UseMI = OwnerN.Addr->getCode();
- DEBUG(dbgs() << "\t\t[MI <BB#" << UseMI->getParent()->getNumber()
- << ">]: " << *UseMI << "\n");
+ LLVM_DEBUG(dbgs() << "\t\t[MI <BB#" << UseMI->getParent()->getNumber()
+ << ">]: " << *UseMI << "\n");
Changed |= updateAddUses(AddMI, UseMI);
}
@@ -451,7 +452,7 @@
} else if (MI.getOpcode() == Hexagon::S2_addasl_rrri) {
NodeList AddaslUseList;
- DEBUG(dbgs() << "\nGetting ReachedUses for === " << MI << "\n");
+ LLVM_DEBUG(dbgs() << "\nGetting ReachedUses for === " << MI << "\n");
getAllRealUses(SN, AddaslUseList);
// Process phi nodes.
if (allValidCandidates(SN, AddaslUseList) &&
@@ -515,8 +516,8 @@
} else
Changed = false;
- DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n");
- DEBUG(dbgs() << "[TO]: " << *MIB << "\n");
+ LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n");
+ LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n");
} else if (ImmOpNum == 2 && OldMI->getOperand(3).getImm() == 0) {
short NewOpCode = HII->changeAddrMode_rr_io(*OldMI);
assert(NewOpCode >= 0 && "Invalid New opcode\n");
@@ -526,8 +527,8 @@
MIB.add(ImmOp);
OpStart = 4;
Changed = true;
- DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n");
- DEBUG(dbgs() << "[TO]: " << *MIB << "\n");
+ LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n");
+ LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n");
}
if (Changed)
@@ -568,8 +569,8 @@
OpStart = 3;
}
Changed = true;
- DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n");
- DEBUG(dbgs() << "[TO]: " << *MIB << "\n");
+ LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n");
+ LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n");
} else if (ImmOpNum == 1 && OldMI->getOperand(2).getImm() == 0) {
short NewOpCode = HII->changeAddrMode_rr_io(*OldMI);
assert(NewOpCode >= 0 && "Invalid New opcode\n");
@@ -578,8 +579,8 @@
MIB.add(ImmOp);
OpStart = 3;
Changed = true;
- DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n");
- DEBUG(dbgs() << "[TO]: " << *MIB << "\n");
+ LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n");
+ LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n");
}
if (Changed)
for (unsigned i = OpStart; i < OpEnd; ++i)
@@ -602,7 +603,7 @@
unsigned ImmOpNum) {
NodeAddr<StmtNode *> SA = AddAslUN.Addr->getOwner(*DFG);
- DEBUG(dbgs() << "Processing addasl :" << *AddAslMI << "\n");
+ LLVM_DEBUG(dbgs() << "Processing addasl :" << *AddAslMI << "\n");
NodeList UNodeList;
getAllRealUses(SA, UNodeList);
@@ -613,11 +614,11 @@
"Can't transform this 'AddAsl' instruction!");
NodeAddr<StmtNode *> UseIA = UseUN.Addr->getOwner(*DFG);
- DEBUG(dbgs() << "[InstrNode]: " << Print<NodeAddr<InstrNode *>>(UseIA, *DFG)
- << "\n");
+ LLVM_DEBUG(dbgs() << "[InstrNode]: "
+ << Print<NodeAddr<InstrNode *>>(UseIA, *DFG) << "\n");
MachineInstr *UseMI = UseIA.Addr->getCode();
- DEBUG(dbgs() << "[MI <" << printMBBReference(*UseMI->getParent())
- << ">]: " << *UseMI << "\n");
+ LLVM_DEBUG(dbgs() << "[MI <" << printMBBReference(*UseMI->getParent())
+ << ">]: " << *UseMI << "\n");
const MCInstrDesc &UseMID = UseMI->getDesc();
assert(HII->getAddrMode(*UseMI) == HexagonII::BaseImmOffset);
@@ -695,9 +696,9 @@
!MI->getOperand(2).isImm() || HII->isConstExtended(*MI)))
continue;
- DEBUG(dbgs() << "[Analyzing " << HII->getName(MI->getOpcode()) << "]: "
- << *MI << "\n\t[InstrNode]: "
- << Print<NodeAddr<InstrNode *>>(IA, *DFG) << '\n');
+ LLVM_DEBUG(dbgs() << "[Analyzing " << HII->getName(MI->getOpcode())
+ << "]: " << *MI << "\n\t[InstrNode]: "
+ << Print<NodeAddr<InstrNode *>>(IA, *DFG) << '\n');
NodeList UNodeList;
getAllRealUses(SA, UNodeList);
@@ -733,8 +734,9 @@
bool KeepTfr = false;
- DEBUG(dbgs() << "\t[Total reached uses] : " << UNodeList.size() << "\n");
- DEBUG(dbgs() << "\t[Processing Reached Uses] ===\n");
+ LLVM_DEBUG(dbgs() << "\t[Total reached uses] : " << UNodeList.size()
+ << "\n");
+ LLVM_DEBUG(dbgs() << "\t[Processing Reached Uses] ===\n");
for (auto I = UNodeList.rbegin(), E = UNodeList.rend(); I != E; ++I) {
NodeAddr<UseNode *> UseN = *I;
assert(!(UseN.Addr->getFlags() & NodeAttrs::PhiRef) &&
@@ -742,8 +744,8 @@
NodeAddr<StmtNode *> OwnerN = UseN.Addr->getOwner(*DFG);
MachineInstr *UseMI = OwnerN.Addr->getCode();
- DEBUG(dbgs() << "\t\t[MI <" << printMBBReference(*UseMI->getParent())
- << ">]: " << *UseMI << "\n");
+ LLVM_DEBUG(dbgs() << "\t\t[MI <" << printMBBReference(*UseMI->getParent())
+ << ">]: " << *UseMI << "\n");
int UseMOnum = -1;
unsigned NumOperands = UseMI->getNumOperands();
@@ -793,8 +795,8 @@
Deleted.clear();
NodeAddr<FuncNode *> FA = DFG->getFunc();
- DEBUG(dbgs() << "==== [RefMap#]=====:\n "
- << Print<NodeAddr<FuncNode *>>(FA, *DFG) << "\n");
+ LLVM_DEBUG(dbgs() << "==== [RefMap#]=====:\n "
+ << Print<NodeAddr<FuncNode *>>(FA, *DFG) << "\n");
for (NodeAddr<BlockNode *> BA : FA.Addr->members(*DFG))
Changed |= processBlock(BA);