Move instances of std::function.
Or replace with llvm::function_ref if it's never stored. NFC intended.
llvm-svn: 272513
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
index 9ac1920..4b6cc65 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -112,8 +112,8 @@
// Helper Functions
//===----------------------------------------------------------------------===//
-int GCNHazardRecognizer::getWaitStatesSinceDef(unsigned Reg,
- std::function<bool(MachineInstr*)> IsHazardDef ) {
+int GCNHazardRecognizer::getWaitStatesSinceDef(
+ unsigned Reg, function_ref<bool(MachineInstr *)> IsHazardDef) {
const TargetRegisterInfo *TRI =
MF.getSubtarget<AMDGPUSubtarget>().getRegisterInfo();
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
index 7fde1d9..3c0a808 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
@@ -14,8 +14,8 @@
#ifndef LLVM_LIB_TARGET_AMDGPUHAZARDRECOGNIZERS_H
#define LLVM_LIB_TARGET_AMDGPUHAZARDRECOGNIZERS_H
+#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
-#include <functional>
#include <list>
namespace llvm {
@@ -35,8 +35,8 @@
const MachineFunction &MF;
int getWaitStatesSinceDef(unsigned Reg,
- std::function<bool(MachineInstr*)> IsHazardDef =
- [](MachineInstr*) {return true;});
+ function_ref<bool(MachineInstr *)> IsHazardDef =
+ [](MachineInstr *) { return true; });
int checkSMEMSoftClauseHazards(MachineInstr *SMEM);
int checkSMRDHazards(MachineInstr *SMRD);
diff --git a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
index a21bd05..e1b1266 100644
--- a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
+++ b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
@@ -1098,5 +1098,5 @@
/// reduction pass.
FunctionPass *llvm::createThumb2SizeReductionPass(
std::function<bool(const Function &)> Ftor) {
- return new Thumb2SizeReduce(Ftor);
+ return new Thumb2SizeReduce(std::move(Ftor));
}
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index bd614c1..4529609 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -98,7 +98,7 @@
void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); }
void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
bool MipsTargetStreamer::emitDirectiveCpRestore(
- int Offset, std::function<unsigned()> GetATReg, SMLoc IDLoc,
+ int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
const MCSubtargetInfo *STI) {
forbidModuleDirective();
return true;
@@ -229,7 +229,7 @@
/// Emit a store instruction with an immediate offset.
void MipsTargetStreamer::emitStoreWithImmOffset(
unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset,
- std::function<unsigned()> GetATReg, SMLoc IDLoc,
+ function_ref<unsigned()> GetATReg, SMLoc IDLoc,
const MCSubtargetInfo *STI) {
if (isInt<16>(Offset)) {
emitRRI(Opcode, SrcReg, BaseReg, Offset, IDLoc, STI);
@@ -586,7 +586,7 @@
}
bool MipsTargetAsmStreamer::emitDirectiveCpRestore(
- int Offset, std::function<unsigned()> GetATReg, SMLoc IDLoc,
+ int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
const MCSubtargetInfo *STI) {
MipsTargetStreamer::emitDirectiveCpRestore(Offset, GetATReg, IDLoc, STI);
OS << "\t.cprestore\t" << Offset << "\n";
@@ -1049,7 +1049,7 @@
}
bool MipsTargetELFStreamer::emitDirectiveCpRestore(
- int Offset, std::function<unsigned()> GetATReg, SMLoc IDLoc,
+ int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
const MCSubtargetInfo *STI) {
MipsTargetStreamer::emitDirectiveCpRestore(Offset, GetATReg, IDLoc, STI);
// .cprestore offset
diff --git a/llvm/lib/Target/Mips/MipsTargetStreamer.h b/llvm/lib/Target/Mips/MipsTargetStreamer.h
index 01eee48..41ebe41 100644
--- a/llvm/lib/Target/Mips/MipsTargetStreamer.h
+++ b/llvm/lib/Target/Mips/MipsTargetStreamer.h
@@ -13,10 +13,10 @@
#include "MCTargetDesc/MipsABIFlagsSection.h"
#include "MCTargetDesc/MipsABIInfo.h"
#include "llvm/ADT/Optional.h"
+#include "llvm/ADT/STLExtras.h"
#include "llvm/MC/MCELFStreamer.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCStreamer.h"
-#include <functional>
namespace llvm {
@@ -84,7 +84,7 @@
// PIC support
virtual void emitDirectiveCpLoad(unsigned RegNo);
virtual bool emitDirectiveCpRestore(int Offset,
- std::function<unsigned()> GetATReg,
+ function_ref<unsigned()> GetATReg,
SMLoc IDLoc, const MCSubtargetInfo *STI);
virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
const MCSymbol &Sym, bool IsReg);
@@ -133,7 +133,7 @@
/// by reporting an error).
void emitStoreWithImmOffset(unsigned Opcode, unsigned SrcReg,
unsigned BaseReg, int64_t Offset,
- std::function<unsigned()> GetATReg, SMLoc IDLoc,
+ function_ref<unsigned()> GetATReg, SMLoc IDLoc,
const MCSubtargetInfo *STI);
void emitStoreWithSymOffset(unsigned Opcode, unsigned SrcReg,
unsigned BaseReg, MCOperand &HiOperand,
@@ -255,7 +255,7 @@
/// temporary and is only called when the assembler temporary is required. It
/// must handle the case where no assembler temporary is available (typically
/// by reporting an error).
- bool emitDirectiveCpRestore(int Offset, std::function<unsigned()> GetATReg,
+ bool emitDirectiveCpRestore(int Offset, function_ref<unsigned()> GetATReg,
SMLoc IDLoc, const MCSubtargetInfo *STI) override;
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
const MCSymbol &Sym, bool IsReg) override;
@@ -311,7 +311,7 @@
// PIC support
void emitDirectiveCpLoad(unsigned RegNo) override;
- bool emitDirectiveCpRestore(int Offset, std::function<unsigned()> GetATReg,
+ bool emitDirectiveCpRestore(int Offset, function_ref<unsigned()> GetATReg,
SMLoc IDLoc, const MCSubtargetInfo *STI) override;
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
const MCSymbol &Sym, bool IsReg) override;