| commit | d486d3f8d14845a9d0f71f1e3e3d2a3d979fe5c1 | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Wed Oct 12 18:49:05 2016 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Wed Oct 12 18:49:05 2016 +0000 |
| tree | ae1fefe0ecf61fc4e1eace5f1dc3222d64c8646c | |
| parent | 4b9b3791727dd8664c2d228ce3abeb5be82719ca [diff] |
AMDGPU: Initial implementation of VGPR indexing mode This is the most basic handling of the indirect access pseudos using GPR indexing mode. This currently only enables the mode for a single v_mov_b32 and then disables it. This is much more complicated to use than the movrel instructions, so a new optimization pass is probably needed to fold the access into the uses and keep the mode enabled for them. llvm-svn: 284031