Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.
Added two test cases to arm-tests.txt.
llvm-svn: 110880
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 827b743..f058ee1 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -2356,7 +2356,7 @@
// memory barriers protect the atomic sequences
let hasSideEffects = 1 in {
-def DMBsy : AInoP<(outs), (ins), Pseudo, NoItinerary, "dmb", "",
+def DMBsy : AInoP<(outs), (ins), MiscFrm, NoItinerary, "dmb", "",
[(ARMMemBarrier)]>, Requires<[IsARM, HasDB]> {
let Inst{31-4} = 0xf57ff05;
// FIXME: add support for options other than a full system DMB
@@ -2364,7 +2364,7 @@
let Inst{3-0} = 0b1111;
}
-def DSBsy : AInoP<(outs), (ins), Pseudo, NoItinerary, "dsb", "",
+def DSBsy : AInoP<(outs), (ins), MiscFrm, NoItinerary, "dsb", "",
[(ARMSyncBarrier)]>, Requires<[IsARM, HasDB]> {
let Inst{31-4} = 0xf57ff04;
// FIXME: add support for options other than a full system DSB
@@ -2372,7 +2372,7 @@
let Inst{3-0} = 0b1111;
}
-def DMB_MCR : AInoP<(outs), (ins GPR:$zero), Pseudo, NoItinerary,
+def DMB_MCR : AInoP<(outs), (ins GPR:$zero), MiscFrm, NoItinerary,
"mcr", "\tp15, 0, $zero, c7, c10, 5",
[(ARMMemBarrierMCR GPR:$zero)]>,
Requires<[IsARM, HasV6]> {
@@ -2380,7 +2380,7 @@
// FIXME: add encoding
}
-def DSB_MCR : AInoP<(outs), (ins GPR:$zero), Pseudo, NoItinerary,
+def DSB_MCR : AInoP<(outs), (ins GPR:$zero), MiscFrm, NoItinerary,
"mcr", "\tp15, 0, $zero, c7, c10, 4",
[(ARMSyncBarrierMCR GPR:$zero)]>,
Requires<[IsARM, HasV6]> {