[ARM] Dynamic stack alignment for 16-bit Thumb
This patch implements dynamic stack (re-)alignment for 16-bit Thumb. When
targeting processors, which support only the 16-bit Thumb instruction set
the compiler ignores the alignment attributes of automatic variables and may
silently generate incorrect code.
Differential revision: https://reviews.llvm.org/D38143
llvm-svn: 316289
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index 4af744f..ce4add9 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -1610,14 +1610,14 @@
if (AFI->getArgRegsSaveSize() > 0)
SavedRegs.set(ARM::LR);
- // Spill R4 if Thumb1 epilogue has to restore SP from FP. We don't know
- // for sure what the stack size will be, but for this, an estimate is good
- // enough. If there anything changes it, it'll be a spill, which implies
- // we've used all the registers and so R4 is already used, so not marking
- // it here will be OK.
+ // Spill R4 if Thumb1 epilogue has to restore SP from FP or the function
+ // requires stack alignment. We don't know for sure what the stack size
+ // will be, but for this, an estimate is good enough. If there anything
+ // changes it, it'll be a spill, which implies we've used all the registers
+ // and so R4 is already used, so not marking it here will be OK.
// FIXME: It will be better just to find spare register here.
- unsigned StackSize = MFI.estimateStackSize(MF);
- if (MFI.hasVarSizedObjects() || StackSize > 508)
+ if (MFI.hasVarSizedObjects() || RegInfo->needsStackRealignment(MF) ||
+ MFI.estimateStackSize(MF) > 508)
SavedRegs.set(ARM::R4);
}