[SystemZ::TTI] Improve costs for i16 add, sub and mul against memory.
AH, SH and MH costs are already covered in the cases where LHS is 32 bits and
RHS is 16 bits of memory sign-extended to i32.
As these instructions are also used when LHS is i16, this patch recognizes
that the loads will get folded then as well.
Review: Ulrich Weigand
https://reviews.llvm.org/D54940
llvm-svn: 347734
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
index fdb998e..362d2d3 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -908,6 +908,10 @@
UserI->getOpcode() == Instruction::UDiv) &&
UserI->getOperand(1) != FoldedValue)
return false; // Not commutative, only RHS foldable.
+ // LoadOrTruncBits holds the number of effectively loaded bits, but 0 if an
+ // extension was made of the load.
+ unsigned LoadOrTruncBits =
+ ((SExtBits || ZExtBits) ? 0 : (TruncBits ? TruncBits : LoadedBits));
switch (UserI->getOpcode()) {
case Instruction::Add: // SE: 16->32, 16/32->64, z14:16->64. ZE: 32->64
case Instruction::Sub:
@@ -919,6 +923,8 @@
(SExtBits == 32 ||
(SExtBits == 64 && ST->hasMiscellaneousExtensions2())))
return true;
+ if (LoadOrTruncBits == 16)
+ return true;
LLVM_FALLTHROUGH;
case Instruction::SDiv:// SE: 32->64
if (LoadedBits == 32 && SExtBits == 64)
@@ -938,16 +944,12 @@
// case Instruction::FDiv:
// All possible extensions of memory checked above.
- if (SExtBits || ZExtBits)
- return false;
// Comparison between memory and immediate.
if (UserI->getOpcode() == Instruction::ICmp)
if (ConstantInt *CI = dyn_cast<ConstantInt>(UserI->getOperand(1)))
if (isUInt<16>(CI->getZExtValue()))
return true;
-
- unsigned LoadOrTruncBits = (TruncBits ? TruncBits : LoadedBits);
return (LoadOrTruncBits == 32 || LoadOrTruncBits == 64);
break;
}