Make the ARM ABI selectable via SubtargetFeature.
This patch makes it possible to select the ABI with -mattr. It will be used to
forward clang's -target-abi option to llvm's CodeGen.
llvm-svn: 198304
diff --git a/llvm/test/CodeGen/ARM/arm-abi-attr.ll b/llvm/test/CodeGen/ARM/arm-abi-attr.ll
new file mode 100644
index 0000000..f3923ae
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/arm-abi-attr.ll
@@ -0,0 +1,28 @@
+; RUN: llc -mtriple=arm-linux < %s | FileCheck %s --check-prefix=APCS
+; RUN: llc -mtriple=arm-linux -mattr=apcs < %s | \
+; RUN: FileCheck %s --check-prefix=APCS
+; RUN: llc -mtriple=arm-linux-gnueabi -mattr=apcs < %s | \
+; RUN: FileCheck %s --check-prefix=APCS
+
+; RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s --check-prefix=AAPCS
+; RUN: llc -mtriple=arm-linux-gnueabi -mattr=aapcs < %s | \
+; RUN: FileCheck %s --check-prefix=AAPCS
+; RUN: llc -mtriple=arm-linux-gnu -mattr=aapcs < %s | \
+; RUN: FileCheck %s --check-prefix=AAPCS
+
+; The stack is 8 byte aligned on AAPCS and 4 on APCS, so we should get a BIC
+; only on APCS.
+
+define void @g() {
+; APCS: sub sp, sp, #8
+; APCS: bic sp, sp, #7
+
+; AAPCS: sub sp, sp, #8
+; AAPCS-NOT: bic
+
+ %c = alloca i8, align 8
+ call void @f(i8* %c)
+ ret void
+}
+
+declare void @f(i8*)