commit d913448b38bab6ace92ae5057b917eb57035f83b
author Eric Christopher <echristo@gmail.com> Mon Aug 04 21:25:23 2014 +0000
committer Eric Christopher <echristo@gmail.com> Mon Aug 04 21:25:23 2014 +0000
tree f2050928fa5994c44fab60d66e7d89e7cc7d7a4f
parent acc8ef273b1c3796b0fc7f19aa347115b4bc2ea4

Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

llvm-svn: 214781

llvm/lib/CodeGen/PeepholeOptimizer.cpp

diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
index 716cb1f..768fcf7 100644
--- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -78,6 +78,7 @@
 #include "llvm/Support/Debug.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
 using namespace llvm;
 
 #define DEBUG_TYPE "peephole-opt"
@@ -277,7 +278,8 @@
   // Ensure DstReg can get a register class that actually supports
   // sub-registers. Don't change the class until we commit.
   const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg);
-  DstRC = TM->getRegisterInfo()->getSubClassWithSubReg(DstRC, SubIdx);
+  DstRC = TM->getSubtargetImpl()->getRegisterInfo()->getSubClassWithSubReg(
+      DstRC, SubIdx);
   if (!DstRC)
     return false;
 
@@ -286,8 +288,9 @@
   // register.
   // If UseSrcSubIdx is Set, SubIdx also applies to SrcReg, and only uses of
   // SrcReg:SubIdx should be replaced.
-  bool UseSrcSubIdx = TM->getRegisterInfo()->
-    getSubClassWithSubReg(MRI->getRegClass(SrcReg), SubIdx) != nullptr;
+  bool UseSrcSubIdx =
+      TM->getSubtargetImpl()->getRegisterInfo()->getSubClassWithSubReg(
+          MRI->getRegClass(SrcReg), SubIdx) != nullptr;
 
   // The source has other uses. See if we can replace the other uses with use of
   // the result of the extension.
@@ -546,7 +549,7 @@
   unsigned Src;
   unsigned SrcSubReg;
   bool ShouldRewrite = false;
-  const TargetRegisterInfo &TRI = *TM->getRegisterInfo();
+  const TargetRegisterInfo &TRI = *TM->getSubtargetImpl()->getRegisterInfo();
 
   // Follow the chain of copies until we reach the top of the use-def chain
   // or find a more suitable source.
@@ -674,7 +677,7 @@
     return false;
 
   TM  = &MF.getTarget();
-  TII = TM->getInstrInfo();
+  TII = TM->getSubtargetImpl()->getInstrInfo();
   MRI = &MF.getRegInfo();
   DT  = Aggressive ? &getAnalysis<MachineDominatorTree>() : nullptr;