| commit | 38fb34443ced261cc201a2e5f1dd55cf979185ed | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Wed Sep 04 16:19:34 2019 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Wed Sep 04 16:19:34 2019 +0000 |
| tree | 066f5250905eefe27185a35b2ea4d6869ac01bec | |
| parent | 240a2e25c6ded8b68b33751286180de7b242bf42 [diff] |
GlobalISel/TableGen: Don't skip REG_SEQUENCE based on patterns This partially adds support for patterns with REG_SEQUENCE. The source patterns are now accepted, but the pattern is still rejected due to missing support for the instruction renderer. llvm-svn: 370920