[WebAssembly] Adding 64-bit versions of all load & store ops.
Context: https://github.com/WebAssembly/memory64/blob/master/proposals/memory64/Overview.md
This is just a first step, adding the new instruction variants while keeping the existing 32-bit functionality working.
Some of the basic load/store tests have new wasm64 versions that show that the basics of the target are working.
Further features need implementation, but these will be added in followups to keep things reviewable.
Differential Revision: https://reviews.llvm.org/D80769
diff --git a/llvm/test/CodeGen/WebAssembly/atomic-fence.mir b/llvm/test/CodeGen/WebAssembly/atomic-fence.mir
index 2678f5a..9b9540f 100644
--- a/llvm/test/CodeGen/WebAssembly/atomic-fence.mir
+++ b/llvm/test/CodeGen/WebAssembly/atomic-fence.mir
@@ -26,7 +26,7 @@
tracksRegLiveness: true
body: |
bb.0:
- ; CHECK: %[[REG:[0-9]+]]:i32 = ATOMIC_NOTIFY
+ ; CHECK: %[[REG:[0-9]+]]:i32 = ATOMIC_NOTIFY_A32
; CHECK: LOCAL_SET_I32 [[LOCAL:[0-9]+]], %[[REG]]
; CHECK: COMPILER_FENCE
; CHECK: ADD_I32
@@ -35,7 +35,7 @@
liveins: $arguments
%0:i32 = CONST_I32 0, implicit-def $arguments
- %1:i32 = ATOMIC_NOTIFY 2, 0, %0:i32, %0:i32, implicit-def $arguments
+ %1:i32 = ATOMIC_NOTIFY_A32 2, 0, %0:i32, %0:i32, implicit-def $arguments
COMPILER_FENCE implicit-def $arguments
%2:i32 = ADD_I32 %0:i32, %0:i32, implicit-def $arguments
CALL @foo, %2:i32, %1:i32, implicit-def $arguments
@@ -50,7 +50,7 @@
tracksRegLiveness: true
body: |
bb.0:
- ; CHECK: %[[REG:[0-9]+]]:i32 = ATOMIC_NOTIFY
+ ; CHECK: %[[REG:[0-9]+]]:i32 = ATOMIC_NOTIFY_A32
; CHECK: LOCAL_SET_I32 [[LOCAL:[0-9]+]], %[[REG]]
; CHECK: ATOMIC_FENCE
; CHECK: ADD_I32
@@ -59,7 +59,7 @@
liveins: $arguments
%0:i32 = CONST_I32 0, implicit-def $arguments
- %1:i32 = ATOMIC_NOTIFY 2, 0, %0:i32, %0:i32, implicit-def $arguments
+ %1:i32 = ATOMIC_NOTIFY_A32 2, 0, %0:i32, %0:i32, implicit-def $arguments
ATOMIC_FENCE 0, implicit-def $arguments
%2:i32 = ADD_I32 %0:i32, %0:i32, implicit-def $arguments
CALL @foo, %2:i32, %1:i32, implicit-def $arguments
diff --git a/llvm/test/CodeGen/WebAssembly/cpus.ll b/llvm/test/CodeGen/WebAssembly/cpus.ll
index b9210bd..8ede6cb 100644
--- a/llvm/test/CodeGen/WebAssembly/cpus.ll
+++ b/llvm/test/CodeGen/WebAssembly/cpus.ll
@@ -1,17 +1,16 @@
; This tests that llc accepts all valid WebAssembly CPUs.
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s
-; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=mvp 2>&1 | FileCheck %s --check-prefix=WASM64
+; RUN: llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=mvp 2>&1 | FileCheck %s
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
-; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=generic 2>&1 | FileCheck %s --check-prefix=WASM64
+; RUN: llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=generic 2>&1 | FileCheck %s
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s
-; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=bleeding-edge 2>&1 | FileCheck %s --check-prefix=WASM64
+; RUN: llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=bleeding-edge 2>&1 | FileCheck %s
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
-; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=WASM64
+; RUN: llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
; CHECK-NOT: is not a recognized processor for this target
; INVALID: {{.+}} is not a recognized processor for this target
-; WASM64: 64-bit WebAssembly (wasm64) is not currently supported
define i32 @f(i32 %i_like_the_web) {
ret i32 %i_like_the_web
diff --git a/llvm/test/CodeGen/WebAssembly/load-ext-atomic.ll b/llvm/test/CodeGen/WebAssembly/load-ext-atomic.ll
index a6d7d4f..a0eb548 100644
--- a/llvm/test/CodeGen/WebAssembly/load-ext-atomic.ll
+++ b/llvm/test/CodeGen/WebAssembly/load-ext-atomic.ll
@@ -1,10 +1,8 @@
-; RUN: llc < %s -mattr=+atomics,+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -mattr=+atomics,+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK32 %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -mattr=+atomics,+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK64 %s
; Test that extending loads are assembled properly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-unknown"
-
; CHECK-LABEL: sext_i8_i32:
; CHECK: i32.atomic.load8_u $push0=, 0($0){{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
diff --git a/llvm/test/CodeGen/WebAssembly/load-ext.ll b/llvm/test/CodeGen/WebAssembly/load-ext.ll
index 5ff40a5..3cb21b9 100644
--- a/llvm/test/CodeGen/WebAssembly/load-ext.ll
+++ b/llvm/test/CodeGen/WebAssembly/load-ext.ll
@@ -1,10 +1,8 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK32 %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK64 %s
; Test that extending loads are assembled properly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-unknown"
-
; CHECK-LABEL: sext_i8_i32:
; CHECK: i32.load8_s $push0=, 0($0){{$}}
; CHECK-NEXT: return $pop0{{$}}
diff --git a/llvm/test/CodeGen/WebAssembly/load-store-i1.ll b/llvm/test/CodeGen/WebAssembly/load-store-i1.ll
index bef50a7..9fce8a6 100644
--- a/llvm/test/CodeGen/WebAssembly/load-store-i1.ll
+++ b/llvm/test/CodeGen/WebAssembly/load-store-i1.ll
@@ -1,10 +1,8 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK32 %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK64 %s
; Test that i1 extending loads and truncating stores are assembled properly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-unknown"
-
; CHECK-LABEL: load_u_i1_i32:
; CHECK: i32.load8_u $push[[NUM0:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM0]]{{$}}
diff --git a/llvm/test/CodeGen/WebAssembly/load.ll b/llvm/test/CodeGen/WebAssembly/load.ll
index b06bef4..e786c329 100644
--- a/llvm/test/CodeGen/WebAssembly/load.ll
+++ b/llvm/test/CodeGen/WebAssembly/load.ll
@@ -1,13 +1,13 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK32 %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck --check-prefixes CHECK,CHK32 %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK64 %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck --check-prefixes CHECK,CHK64 %s
; Test that basic loads are assembled properly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-unknown"
-
; CHECK-LABEL: ldi32:
-; CHECK-NEXT: .functype ldi32 (i32) -> (i32){{$}}
+; CHK32-NEXT: .functype ldi32 (i32) -> (i32){{$}}
+; CHK64-NEXT: .functype ldi32 (i64) -> (i32){{$}}
; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -17,7 +17,8 @@
}
; CHECK-LABEL: ldi64:
-; CHECK-NEXT: .functype ldi64 (i32) -> (i64){{$}}
+; CHK32-NEXT: .functype ldi64 (i32) -> (i64){{$}}
+; CHK64-NEXT: .functype ldi64 (i64) -> (i64){{$}}
; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -27,7 +28,8 @@
}
; CHECK-LABEL: ldf32:
-; CHECK-NEXT: .functype ldf32 (i32) -> (f32){{$}}
+; CHK32-NEXT: .functype ldf32 (i32) -> (f32){{$}}
+; CHK64-NEXT: .functype ldf32 (i64) -> (f32){{$}}
; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -37,7 +39,8 @@
}
; CHECK-LABEL: ldf64:
-; CHECK-NEXT: .functype ldf64 (i32) -> (f64){{$}}
+; CHK32-NEXT: .functype ldf64 (i32) -> (f64){{$}}
+; CHK64-NEXT: .functype ldf64 (i64) -> (f64){{$}}
; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
diff --git a/llvm/test/CodeGen/WebAssembly/store-trunc-atomic.ll b/llvm/test/CodeGen/WebAssembly/store-trunc-atomic.ll
index 1ae92d2..eb43769 100644
--- a/llvm/test/CodeGen/WebAssembly/store-trunc-atomic.ll
+++ b/llvm/test/CodeGen/WebAssembly/store-trunc-atomic.ll
@@ -1,10 +1,8 @@
-; RUN: llc < %s -mattr=+atomics,+sign-ext -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -mattr=+atomics,+sign-ext -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK32 %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -mattr=+atomics,+sign-ext -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK64 %s
; Test that truncating stores are assembled properly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-unknown"
-
; CHECK-LABEL: trunc_i8_i32:
; CHECK: i32.atomic.store8 0($0), $1{{$}}
define void @trunc_i8_i32(i8 *%p, i32 %v) {
diff --git a/llvm/test/CodeGen/WebAssembly/store-trunc.ll b/llvm/test/CodeGen/WebAssembly/store-trunc.ll
index 201a2e7..60fd484 100644
--- a/llvm/test/CodeGen/WebAssembly/store-trunc.ll
+++ b/llvm/test/CodeGen/WebAssembly/store-trunc.ll
@@ -1,10 +1,8 @@
-; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK32 %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK64 %s
; Test that truncating stores are assembled properly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-unknown"
-
; CHECK-LABEL: trunc_i8_i32:
; CHECK: i32.store8 0($0), $1{{$}}
define void @trunc_i8_i32(i8 *%p, i32 %v) {
diff --git a/llvm/test/CodeGen/WebAssembly/store.ll b/llvm/test/CodeGen/WebAssembly/store.ll
index c107d9a..66012a7 100644
--- a/llvm/test/CodeGen/WebAssembly/store.ll
+++ b/llvm/test/CodeGen/WebAssembly/store.ll
@@ -1,5 +1,7 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK32 %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck --check-prefixes CHECK,CHK32 %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK64 %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck --check-prefixes CHECK,CHK64 %s
; Test that basic stores are assembled properly.
@@ -7,7 +9,8 @@
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sti32:
-; CHECK-NEXT: .functype sti32 (i32, i32) -> (){{$}}
+; CHK32-NEXT: .functype sti32 (i32, i32) -> (){{$}}
+; CHK64-NEXT: .functype sti32 (i64, i32) -> (){{$}}
; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.store 0($pop[[L0]]), $pop[[L1]]{{$}}
@@ -18,7 +21,8 @@
}
; CHECK-LABEL: sti64:
-; CHECK-NEXT: .functype sti64 (i32, i64) -> (){{$}}
+; CHK32-NEXT: .functype sti64 (i32, i64) -> (){{$}}
+; CHK64-NEXT: .functype sti64 (i64, i64) -> (){{$}}
; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.store 0($pop[[L0]]), $pop[[L1]]{{$}}
@@ -29,7 +33,8 @@
}
; CHECK-LABEL: stf32:
-; CHECK-NEXT: .functype stf32 (i32, f32) -> (){{$}}
+; CHK32-NEXT: .functype stf32 (i32, f32) -> (){{$}}
+; CHK64-NEXT: .functype stf32 (i64, f32) -> (){{$}}
; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.store 0($pop[[L0]]), $pop[[L1]]{{$}}
@@ -40,7 +45,8 @@
}
; CHECK-LABEL: stf64:
-; CHECK-NEXT: .functype stf64 (i32, f64) -> (){{$}}
+; CHK32-NEXT: .functype stf64 (i32, f64) -> (){{$}}
+; CHK64-NEXT: .functype stf64 (i64, f64) -> (){{$}}
; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.store 0($pop[[L0]]), $pop[[L1]]{{$}}