WebAssembly: implement comparison.
Some of the FP comparisons (ueq, one, ult, ule, ugt, uge) are currently broken, I'll fix them in a follow-up.
Reviewers: sunfish
Subscribers: llvm-commits, jfb
Differential Revision: http://reviews.llvm.org/D11924
llvm-svn: 244665
diff --git a/llvm/test/CodeGen/WebAssembly/comparisons_f32.ll b/llvm/test/CodeGen/WebAssembly/comparisons_f32.ll
new file mode 100644
index 0000000..1cb76a4
--- /dev/null
+++ b/llvm/test/CodeGen/WebAssembly/comparisons_f32.ll
@@ -0,0 +1,65 @@
+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 32-bit floating-point comparison operations assemble as
+; expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; FIXME: add ord and uno tests.
+
+; CHECK-LABEL: oeq_f32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (eq @1 @0))
+; CHECK-NEXT: (setlocal @3 (immediate 1))
+; CHECK-NEXT: (setlocal @4 (and @2 @3))
+; CHECK-NEXT: (return @4)
+define i32 @oeq_f32(float %x, float %y) {
+ %a = fcmp oeq float %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: une_f32:
+; CHECK: (setlocal @2 (ne @1 @0))
+define i32 @une_f32(float %x, float %y) {
+ %a = fcmp une float %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: olt_f32:
+; CHECK: (setlocal @2 (lt @1 @0))
+define i32 @olt_f32(float %x, float %y) {
+ %a = fcmp olt float %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ole_f32:
+; CHECK: (setlocal @2 (le @1 @0))
+define i32 @ole_f32(float %x, float %y) {
+ %a = fcmp ole float %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ogt_f32:
+; CHECK: (setlocal @2 (gt @1 @0))
+define i32 @ogt_f32(float %x, float %y) {
+ %a = fcmp ogt float %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: oge_f32:
+; CHECK: (setlocal @2 (ge @1 @0))
+define i32 @oge_f32(float %x, float %y) {
+ %a = fcmp oge float %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; FIXME test other FP comparisons: ueq, one, ult, ule, ugt, uge. They currently
+; are broken and failt to match.
diff --git a/llvm/test/CodeGen/WebAssembly/comparisons_f64.ll b/llvm/test/CodeGen/WebAssembly/comparisons_f64.ll
new file mode 100644
index 0000000..446a09b
--- /dev/null
+++ b/llvm/test/CodeGen/WebAssembly/comparisons_f64.ll
@@ -0,0 +1,65 @@
+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 64-bit floating-point comparison operations assemble as
+; expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; FIXME: add ord and uno tests.
+
+; CHECK-LABEL: oeq_f64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (eq @1 @0))
+; CHECK-NEXT: (setlocal @3 (immediate 1))
+; CHECK-NEXT: (setlocal @4 (and @2 @3))
+; CHECK-NEXT: (return @4)
+define i32 @oeq_f64(double %x, double %y) {
+ %a = fcmp oeq double %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: une_f64:
+; CHECK: (setlocal @2 (ne @1 @0))
+define i32 @une_f64(double %x, double %y) {
+ %a = fcmp une double %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: olt_f64:
+; CHECK: (setlocal @2 (lt @1 @0))
+define i32 @olt_f64(double %x, double %y) {
+ %a = fcmp olt double %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ole_f64:
+; CHECK: (setlocal @2 (le @1 @0))
+define i32 @ole_f64(double %x, double %y) {
+ %a = fcmp ole double %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ogt_f64:
+; CHECK: (setlocal @2 (gt @1 @0))
+define i32 @ogt_f64(double %x, double %y) {
+ %a = fcmp ogt double %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: oge_f64:
+; CHECK: (setlocal @2 (ge @1 @0))
+define i32 @oge_f64(double %x, double %y) {
+ %a = fcmp oge double %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; FIXME test other FP comparisons: ueq, one, ult, ule, ugt, uge. They currently
+; are broken and failt to match.
diff --git a/llvm/test/CodeGen/WebAssembly/comparisons_i32.ll b/llvm/test/CodeGen/WebAssembly/comparisons_i32.ll
new file mode 100644
index 0000000..3dc387f
--- /dev/null
+++ b/llvm/test/CodeGen/WebAssembly/comparisons_i32.ll
@@ -0,0 +1,91 @@
+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 32-bit integer comparison operations assemble as expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; CHECK-LABEL: eq_i32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (eq @1 @0))
+; CHECK-NEXT: (setlocal @3 (immediate 1))
+; CHECK-NEXT: (setlocal @4 (and @2 @3))
+; CHECK-NEXT: (return @4)
+define i32 @eq_i32(i32 %x, i32 %y) {
+ %a = icmp eq i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ne_i32:
+; CHECK: (setlocal @2 (ne @1 @0))
+define i32 @ne_i32(i32 %x, i32 %y) {
+ %a = icmp ne i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: slt_i32:
+; CHECK: (setlocal @2 (slt @1 @0))
+define i32 @slt_i32(i32 %x, i32 %y) {
+ %a = icmp slt i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: sle_i32:
+; CHECK: (setlocal @2 (sle @1 @0))
+define i32 @sle_i32(i32 %x, i32 %y) {
+ %a = icmp sle i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ult_i32:
+; CHECK: (setlocal @2 (ult @1 @0))
+define i32 @ult_i32(i32 %x, i32 %y) {
+ %a = icmp ult i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ule_i32:
+; CHECK: (setlocal @2 (ule @1 @0))
+define i32 @ule_i32(i32 %x, i32 %y) {
+ %a = icmp ule i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: sgt_i32:
+; CHECK: (setlocal @2 (sgt @1 @0))
+define i32 @sgt_i32(i32 %x, i32 %y) {
+ %a = icmp sgt i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: sge_i32:
+; CHECK: (setlocal @2 (sge @1 @0))
+define i32 @sge_i32(i32 %x, i32 %y) {
+ %a = icmp sge i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ugt_i32:
+; CHECK: (setlocal @2 (ugt @1 @0))
+define i32 @ugt_i32(i32 %x, i32 %y) {
+ %a = icmp ugt i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: uge_i32:
+; CHECK: (setlocal @2 (uge @1 @0))
+define i32 @uge_i32(i32 %x, i32 %y) {
+ %a = icmp uge i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
diff --git a/llvm/test/CodeGen/WebAssembly/comparisons_i64.ll b/llvm/test/CodeGen/WebAssembly/comparisons_i64.ll
new file mode 100644
index 0000000..76f331d
--- /dev/null
+++ b/llvm/test/CodeGen/WebAssembly/comparisons_i64.ll
@@ -0,0 +1,91 @@
+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 64-bit integer comparison operations assemble as expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; CHECK-LABEL: eq_i64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (eq @1 @0))
+; CHECK-NEXT: (setlocal @3 (immediate 1))
+; CHECK-NEXT: (setlocal @4 (and @2 @3))
+; CHECK-NEXT: (return @4)
+define i32 @eq_i64(i64 %x, i64 %y) {
+ %a = icmp eq i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ne_i64:
+; CHECK: (setlocal @2 (ne @1 @0))
+define i32 @ne_i64(i64 %x, i64 %y) {
+ %a = icmp ne i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: slt_i64:
+; CHECK: (setlocal @2 (slt @1 @0))
+define i32 @slt_i64(i64 %x, i64 %y) {
+ %a = icmp slt i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: sle_i64:
+; CHECK: (setlocal @2 (sle @1 @0))
+define i32 @sle_i64(i64 %x, i64 %y) {
+ %a = icmp sle i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ult_i64:
+; CHECK: (setlocal @2 (ult @1 @0))
+define i32 @ult_i64(i64 %x, i64 %y) {
+ %a = icmp ult i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ule_i64:
+; CHECK: (setlocal @2 (ule @1 @0))
+define i32 @ule_i64(i64 %x, i64 %y) {
+ %a = icmp ule i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: sgt_i64:
+; CHECK: (setlocal @2 (sgt @1 @0))
+define i32 @sgt_i64(i64 %x, i64 %y) {
+ %a = icmp sgt i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: sge_i64:
+; CHECK: (setlocal @2 (sge @1 @0))
+define i32 @sge_i64(i64 %x, i64 %y) {
+ %a = icmp sge i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ugt_i64:
+; CHECK: (setlocal @2 (ugt @1 @0))
+define i32 @ugt_i64(i64 %x, i64 %y) {
+ %a = icmp ugt i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: uge_i64:
+; CHECK: (setlocal @2 (uge @1 @0))
+define i32 @uge_i64(i64 %x, i64 %y) {
+ %a = icmp uge i64 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}