commit db8467ae26835b57cf1f9a494c8d9e91d570e92b
author Craig Topper <craig.topper@gmail.com> Mon Dec 05 05:50:51 2016 +0000
committer Craig Topper <craig.topper@gmail.com> Mon Dec 05 05:50:51 2016 +0000
tree 76dd1d7dbee050f7c4baa608a49f651f5c6f6b31
parent fde4a454efb5b6766b479fa5607945846ac714ef

[AVX-512] Teach fast isel to handle 512-bit vector bitcasts.

llvm-svn: 288641

llvm/lib/Target/X86/X86FastISel.cpp

diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index 44d918f..53e6ab6 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -3563,8 +3563,14 @@
     if (!SrcVT.isSimple() || !DstVT.isSimple())
       return false;
 
-    if (!SrcVT.is128BitVector() &&
-        !(Subtarget->hasAVX() && SrcVT.is256BitVector()))
+    MVT SVT = SrcVT.getSimpleVT();
+    MVT DVT = DstVT.getSimpleVT();
+
+    if (!SVT.is128BitVector() &&
+        !(Subtarget->hasAVX() && SVT.is256BitVector()) &&
+        !(Subtarget->hasAVX512() && SVT.is512BitVector() &&
+          (Subtarget->hasBWI() || (SVT.getScalarSizeInBits() >= 32 &&
+                                   DVT.getScalarSizeInBits() >= 32))))
       return false;
 
     unsigned Reg = getRegForValue(I->getOperand(0));