[InstSimplify] sgt on i1s also encodes implication
Follow on to http://reviews.llvm.org/D13074, implementing something pointed out by Sanjoy. His truth table from his comment on that bug summarizes things well:
LHS | RHS | LHS >=s RHS | LHS implies RHS
0 | 0 | 1 (0 >= 0) | 1
0 | 1 | 1 (0 >= -1) | 1
1 | 0 | 0 (-1 >= 0) | 0
1 | 1 | 1 (-1 >= -1) | 1
The key point is that an "i1 1" is the value "-1", not "1".
Differential Revision: http://reviews.llvm.org/D13756
llvm-svn: 251597
diff --git a/llvm/test/Transforms/InstSimplify/implies.ll b/llvm/test/Transforms/InstSimplify/implies.ll
index 80b6ac81..ac46b8d 100644
--- a/llvm/test/Transforms/InstSimplify/implies.ll
+++ b/llvm/test/Transforms/InstSimplify/implies.ll
@@ -91,3 +91,14 @@
%res = icmp ule <4 x i1> %a, %b
ret <4 x i1> %res
}
+
+; X >=(s) Y == X ==> Y (i1 1 becomes -1 for reasoning)
+define i1 @test_sge(i32 %length.i, i32 %i) {
+; CHECK-LABEL: @test_sge
+; CHECK: ret i1 true
+ %iplus1 = add nsw nuw i32 %i, 1
+ %var29 = icmp ult i32 %i, %length.i
+ %var30 = icmp ult i32 %iplus1, %length.i
+ %res = icmp sge i1 %var30, %var29
+ ret i1 %res
+}