commit dc03b960d0236c18ed4382cea7bb3eb49329ed04
author Bill Wendling <morbo@google.com> Fri Dec 20 12:47:38 2019 -0800
committer Bill Wendling <morbo@google.com> Fri Dec 20 12:52:36 2019 -0800
tree eccde2f49cf2b5d012fa07bf5ee3166d631d0ddf
parent dedad08ee8e69129a1f6ac104e34960b50c94d94

Add parentheses to silence warning

llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index d24e6d6..f2ff26e 100644
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -831,8 +831,8 @@
             for (auto &MOP : MI.operands()) {
               if (MOP.isReg() && !MOP.isDebug() && MOP.getReg() &&
                   TRI->regsOverlap(MOP.getReg(), RegToRename)) {
-                assert(MOP.isImplicit() ||
-                       (MOP.isRenamable() && !MOP.isEarlyClobber()) &&
+                assert((MOP.isImplicit() ||
+                        (MOP.isRenamable() && !MOP.isEarlyClobber())) &&
                            "Need renamable operands");
                 MOP.setReg(GetMatchingSubReg(MOP.getReg()));
               }