commit dc1eab5886e0b1b08be23949a50a041689c500b6
author Chris Lattner <sabre@nondot.org> Sat Mar 25 22:19:00 2006 +0000
committer Chris Lattner <sabre@nondot.org> Sat Mar 25 22:19:00 2006 +0000
tree 7caa5271e0dad095093f2576f0442407c9c9c32b
parent b3617beb5218e667d28e2522efd0c5d31ce3b986

Don't call SimplifyDemandedBits on vectors

llvm-svn: 27128

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 8a0f488..157b0a2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1120,7 +1120,8 @@
   }
   // fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1)
   // fold (and (sra)) -> (and (srl)) when possible.
-  if (SimplifyDemandedBits(SDOperand(N, 0)))
+  if (!MVT::isVector(VT) &&
+      SimplifyDemandedBits(SDOperand(N, 0)))
     return SDOperand();
   // fold (zext_inreg (extload x)) -> (zextload x)
   if (N0.getOpcode() == ISD::EXTLOAD) {