commit dc45336d09fef50ffd9f7435fd4aa56a70ddca55
author Silviu Baranga <silviu.baranga@arm.com> Wed Mar 27 12:38:44 2013 +0000
committer Silviu Baranga <silviu.baranga@arm.com> Wed Mar 27 12:38:44 2013 +0000
tree 64ee3a598d89960c92719b221b96bf5326551721
parent ffd6d04a438e36e6a7bba150333fff02acc504c5

Enabling the generation of dependency breakers for partial updates on Cortex-A15. Also fixing a small bug in getting the update clearence for VLD1LNd32.

llvm-svn: 178134

llvm/lib/Target/ARM/ARMTargetMachine.cpp

diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index b0f9e56..42c7d2c 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -185,8 +185,7 @@
       addPass(createARMLoadStoreOptimizationPass());
       printAndVerify("After ARM load / store optimizer");
     }
-    if ((DisableA15SDOptimization || !getARMSubtarget().isCortexA15()) &&
-      getARMSubtarget().hasNEON())
+    if (getARMSubtarget().hasNEON())
       addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
   }