Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands().
Blackfin supports and/or/xor on i32 but not on i16. Teach
DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes
after legalize ops.
llvm-svn: 78497
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3d0f337..7dec304 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1679,7 +1679,9 @@
N0.getOpcode() == ISD::SIGN_EXTEND ||
(N0.getOpcode() == ISD::TRUNCATE &&
!TLI.isTruncateFree(N0.getOperand(0).getValueType(), VT))) &&
- N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()) {
+ N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType() &&
+ (!LegalOperations ||
+ TLI.isOperationLegal(N->getOpcode(), N0.getOperand(0).getValueType()))) {
SDValue ORNode = DAG.getNode(N->getOpcode(), N0.getDebugLoc(),
N0.getOperand(0).getValueType(),
N0.getOperand(0), N1.getOperand(0));
diff --git a/llvm/test/CodeGen/Blackfin/promote-logic.ll b/llvm/test/CodeGen/Blackfin/promote-logic.ll
index ba2caef..d2771d1 100644
--- a/llvm/test/CodeGen/Blackfin/promote-logic.ll
+++ b/llvm/test/CodeGen/Blackfin/promote-logic.ll
@@ -1,7 +1,7 @@
; RUN: llvm-as < %s | llc -march=bfin > %t
-; XFAIL: *
-; DAG combiner can produce an illegal i16 OR operation after LegalizeOps.
+; DAGCombiner::SimplifyBinOpWithSameOpcodeHands can produce an illegal i16 OR
+; operation after LegalizeOps.
define void @mng_display_bgr565() {
entry: