commit dca24ddfc75d2d22e5aee6ddd24ad43715fe196b
author Brian Gaeke <gaeke@uiuc.edu> Thu Jun 03 02:45:09 2004 +0000
committer Brian Gaeke <gaeke@uiuc.edu> Thu Jun 03 02:45:09 2004 +0000
tree 67696cbe1b1bf3a61da6424d781a358c5b80e0be
parent f55aa9c49c87c4e6a7b26adafc50f545b4e2dc93

Collapse together the abstract superclass TargetRegInfo and SparcV9RegInfo, its
only concrete implementation.

llvm-svn: 13977

llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp

diff --git a/llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp b/llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp
index a4afc4e..0c36d3b 100644
--- a/llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp
+++ b/llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp
@@ -36,7 +36,7 @@
 };
 
 SparcV9RegInfo::SparcV9RegInfo(const SparcV9TargetMachine &tgt)
-  : TargetRegInfo(tgt), NumOfIntArgRegs(6), NumOfFloatArgRegs(32)
+  : target (tgt), NumOfIntArgRegs (6), NumOfFloatArgRegs (32)
 {
   MachineRegClassArr.push_back(new SparcV9IntRegClass(IntRegClassID));
   MachineRegClassArr.push_back(new SparcV9FloatRegClass(FloatRegClassID));