fix a couple of typos
llvm-svn: 171508
diff --git a/llvm/docs/TableGenFundamentals.rst b/llvm/docs/TableGenFundamentals.rst
index 356b7d2..73bcd66 100644
--- a/llvm/docs/TableGenFundamentals.rst
+++ b/llvm/docs/TableGenFundamentals.rst
@@ -121,11 +121,11 @@
...
This definition corresponds to the 32-bit register-register ``add`` instruction
-of the the x86 architecture. ``def ADD32rr`` defines a record named
+of the x86 architecture. ``def ADD32rr`` defines a record named
``ADD32rr``, and the comment at the end of the line indicates the superclasses
of the definition. The body of the record contains all of the data that
TableGen assembled for the record, indicating that the instruction is part of
-the "X86" namespace, the pattern indicating how the the instruction should be
+the "X86" namespace, the pattern indicating how the instruction should be
emitted into the assembly file, that it is a two-address instruction, has a
particular encoding, etc. The contents and semantics of the information in the
record are specific to the needs of the X86 backend, and are only shown as an