commit dd0eadce7d4d550d3769fdac60c364b2257ab6c8
author Bob Wilson <bob.wilson@apple.com> Fri Sep 18 05:36:13 2015 +0000
committer Bob Wilson <bob.wilson@apple.com> Fri Sep 18 05:36:13 2015 +0000
tree bdaafa2a03463a1c31ba49e60a4a8e06074734d5
parent 630dd7ff3584931f8826247c8c35f31f50385906

Whitespace. Indent with spaces instead of a tab.

llvm-svn: 247969

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 36c6b90..44f222a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -6133,7 +6133,7 @@
       SDISelAsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
 
       if (OpInfo.ConstraintVT != Input.ConstraintVT) {
-	const TargetRegisterInfo *TRI = DAG.getSubtarget().getRegisterInfo();
+        const TargetRegisterInfo *TRI = DAG.getSubtarget().getRegisterInfo();
         std::pair<unsigned, const TargetRegisterClass *> MatchRC =
             TLI.getRegForInlineAsmConstraint(TRI, OpInfo.ConstraintCode,
                                              OpInfo.ConstraintVT);