R600: Non vector only instruction can be scheduled on trans unit
llvm-svn: 187514
diff --git a/llvm/test/CodeGen/R600/kcache-fold.ll b/llvm/test/CodeGen/R600/kcache-fold.ll
index 3d70e4b..8bdb050 100644
--- a/llvm/test/CodeGen/R600/kcache-fold.ll
+++ b/llvm/test/CodeGen/R600/kcache-fold.ll
@@ -1,7 +1,7 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
; CHECK: @main1
-; CHECK: MOV T{{[0-9]+\.[XYZW], KC0}}
+; CHECK: MOV * T{{[0-9]+\.[XYZW], KC0}}
define void @main1() {
main_body:
%0 = load <4 x float> addrspace(8)* null