Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
Summary:
Two utils methods have essentially the same functionality. This is an attempt to merge them into one.
1. lib/Transforms/Utils/Local.cpp : MergeBasicBlockIntoOnlyPred
2. lib/Transforms/Utils/BasicBlockUtils.cpp : MergeBlockIntoPredecessor
Prior to the patch:
1. MergeBasicBlockIntoOnlyPred
Updates either DomTree or DeferredDominance
Moves all instructions from Pred to BB, deletes Pred
Asserts BB has single predecessor
If address was taken, replace the block address with constant 1 (?)
2. MergeBlockIntoPredecessor
Updates DomTree, LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
After the patch:
Method 2. MergeBlockIntoPredecessor is attempting to become the new default:
Updates DomTree or DeferredDominance, and LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
Uses of MergeBasicBlockIntoOnlyPred that need to be replaced:
1. lib/Transforms/Scalar/LoopSimplifyCFG.cpp
Updated in this patch. No challenges.
2. lib/CodeGen/CodeGenPrepare.cpp
Updated in this patch.
i. eliminateFallThrough is straightforward, but I added using a temporary array to avoid the iterator invalidation.
ii. eliminateMostlyEmptyBlock(s) methods also now use a temporary array for blocks
Some interesting aspects:
- Since Pred is not deleted (BB is), the entry block does not need updating.
- The entry block was being updated with the deleted block in eliminateMostlyEmptyBlock. Added assert to make obvious that BB=SinglePred.
- isMergingEmptyBlockProfitable assumes BB is the one to be deleted.
- eliminateMostlyEmptyBlock(BB) does not delete BB on one path, it deletes its unique predecessor instead.
- adding some test owner as subscribers for the interesting tests modified:
test/CodeGen/X86/avx-cmp.ll
test/CodeGen/AMDGPU/nested-loop-conditions.ll
test/CodeGen/AMDGPU/si-annotate-cf.ll
test/CodeGen/X86/hoist-spill.ll
test/CodeGen/X86/2006-11-17-IllegalMove.ll
3. lib/Transforms/Scalar/JumpThreading.cpp
Not covered in this patch. It is the only use case using the DeferredDominance.
I would defer to Brian Rzycki to make this replacement.
Reviewers: chandlerc, spatel, davide, brzycki, bkramer, javed.absar
Subscribers: qcolombet, sanjoy, nemanjai, nhaehnle, jlebar, tpr, kbarton, RKSimon, wmi, arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D48202
llvm-svn: 335183
diff --git a/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll b/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
index 1fb386c..b0ee7f3 100644
--- a/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
+++ b/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
@@ -441,7 +441,7 @@
; GCN-NEXT: s_xor_b64 exec, exec, [[TEMP_MASK1]]
; GCN-NEXT: ; mask branch [[RET:BB[0-9]+_[0-9]+]]
-; GCN: [[LOOP_BODY:BB[0-9]+_[0-9]+]]: ; %loop_body
+; GCN: [[LOOP_BODY:BB[0-9]+_[0-9]+]]: ; %loop
; GCN: ;;#ASMSTART
; GCN: v_nop_e64
; GCN: v_nop_e64
@@ -452,7 +452,7 @@
; GCN: ;;#ASMEND
; GCN: s_cbranch_vccz [[RET]]
-; GCN-NEXT: [[LONGBB:BB[0-9]+_[0-9]+]]: ; %loop_body
+; GCN-NEXT: [[LONGBB:BB[0-9]+_[0-9]+]]: ; %loop
; GCN-NEXT: ; in Loop: Header=[[LOOP_BODY]] Depth=1
; GCN-NEXT: s_getpc_b64 vcc
; GCN-NEXT: s_sub_u32 vcc_lo, vcc_lo, ([[LONGBB]]+4)-[[LOOP_BODY]]
diff --git a/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll b/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
index e198abf..8489a78 100644
--- a/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
+++ b/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
@@ -59,12 +59,12 @@
; GCN-LABEL: {{^}}reduced_nested_loop_conditions:
-; GCN: s_cmp_eq_u32 s{{[0-9]+}}, 1
-; GCN-NEXT: s_cbranch_scc1
+; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1
+; GCN-NEXT: s_cbranch_scc0
; FIXME: Should fold to unconditional branch?
; GCN: ; implicit-def
-; GCN: s_cbranch_vccz
+; GCN: s_cbranch_vccnz
; GCN: ds_read_b32
diff --git a/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll b/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
index 1f91566..7e7f6fc 100644
--- a/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
+++ b/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
@@ -89,11 +89,11 @@
; This broke the old AMDIL cfg structurizer
; FUNC-LABEL: {{^}}loop_land_info_assert:
-; SI: s_cmp_gt_i32
-; SI-NEXT: s_cbranch_scc0 [[ENDPGM:BB[0-9]+_[0-9]+]]
+; SI: s_cmp_lt_i32
+; SI-NEXT: s_cbranch_scc1 [[ENDPGM:BB[0-9]+_[0-9]+]]
-; SI: s_cmpk_gt_i32
-; SI-NEXT: s_cbranch_scc1 [[ENDPGM]]
+; SI: s_cmpk_lt_i32
+; SI-NEXT: s_cbranch_scc0 [[ENDPGM]]
; SI: [[INFLOOP:BB[0-9]+_[0-9]+]]
; SI: s_cbranch_vccnz [[INFLOOP]]
diff --git a/llvm/test/CodeGen/ARM/indirectbr.ll b/llvm/test/CodeGen/ARM/indirectbr.ll
index a3ec2a7..db5014f 100644
--- a/llvm/test/CodeGen/ARM/indirectbr.ll
+++ b/llvm/test/CodeGen/ARM/indirectbr.ll
@@ -47,7 +47,7 @@
br label %L2
L2: ; preds = %L3, %bb2
-; THUMB-LABEL: %L1.clone
+; THUMB-LABEL: %.split4
; THUMB: muls
%res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1]
%phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1]
diff --git a/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll b/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
index 3bfc0de..fd9121a 100644
--- a/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
+++ b/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
@@ -160,7 +160,7 @@
; Validate with memcmp()?:
define signext i32 @equalityFoldTwoConstants() {
; CHECK-LABEL: equalityFoldTwoConstants:
-; CHECK: # %bb.0: # %endblock
+; CHECK: # %bb.0: # %loadbb
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: blr
%call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer2 to i8*), i64 16)
diff --git a/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll b/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll
index 83b1cd5..c1e8107 100644
--- a/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll
+++ b/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll
@@ -7,7 +7,7 @@
define zeroext i1 @opeq1(
; PPC64LE-LABEL: opeq1:
-; PPC64LE: # %bb.0: # %opeq1.exit
+; PPC64LE: # %bb.0: # %entry
; PPC64LE-NEXT: ld 3, 0(3)
; PPC64LE-NEXT: ld 4, 0(4)
; PPC64LE-NEXT: xor 3, 3, 4
diff --git a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
index 6886b4e..621bda0 100644
--- a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
@@ -169,7 +169,7 @@
; CHECK-NEXT: bne 0, .[[LOOP]]
;
; Next BB
-; CHECK: %for.end
+; CHECK: %for.exit
; CHECK: mtlr {{[0-9]+}}
; CHECK-NEXT: blr
define i32 @freqSaveAndRestoreOutsideLoop2(i32 %cond) {
diff --git a/llvm/test/CodeGen/PowerPC/simplifyConstCmpToISEL.ll b/llvm/test/CodeGen/PowerPC/simplifyConstCmpToISEL.ll
index 3988d9c..bf5754d 100644
--- a/llvm/test/CodeGen/PowerPC/simplifyConstCmpToISEL.ll
+++ b/llvm/test/CodeGen/PowerPC/simplifyConstCmpToISEL.ll
@@ -3,7 +3,7 @@
; RUN: -ppc-convert-rr-to-ri -verify-machineinstrs | FileCheck %s
define void @test(i32 zeroext %parts) {
; CHECK-LABEL: test:
-; CHECK: # %bb.0: # %cond.end.i
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmplwi 0, 3, 1
; CHECK-NEXT: bnelr+ 0
; CHECK-NEXT: # %bb.1: # %test2.exit.us.unr-lcssa
diff --git a/llvm/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll b/llvm/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll
index d0afa3c..0372bd7 100644
--- a/llvm/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll
+++ b/llvm/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll
@@ -25,7 +25,7 @@
br i1 undef, label %return, label %bb
return:
-; CHECK: %return
+; CHECK: %bb3
; 'mov sp, r7' would have left sp in an invalid state
; CHECK-NOT: mov sp, r7
; CHECK-NOT: sub, sp, #4
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-jtb.ll b/llvm/test/CodeGen/Thumb2/thumb2-jtb.ll
index c71f37c..ba4638d 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-jtb.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-jtb.ll
@@ -14,9 +14,6 @@
entry:
br i1 %b, label %codeRepl127.exitStub, label %newFuncRoot
-newFuncRoot:
- br label %_getopt_internal.exit.ce
-
codeRepl127.exitStub: ; preds = %_getopt_internal.exit.ce
; Add an explicit edge back to before the jump table to ensure this block
; is placed first.
@@ -103,6 +100,9 @@
codeRepl103.exitStub: ; preds = %_getopt_internal.exit.ce
ret i16 26
+newFuncRoot:
+ br label %_getopt_internal.exit.ce
+
_getopt_internal.exit.ce: ; preds = %newFuncRoot
switch i32 %0, label %codeRepl127.exitStub [
i32 -1, label %parse_options.exit.loopexit.exitStub
diff --git a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll
index 268d5af..4af4684 100644
--- a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll
+++ b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll
@@ -6,9 +6,9 @@
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl 0, %eax
; CHECK-NEXT: decl %eax
-; CHECK-NEXT: cmpl $2, %eax
-; CHECK-NEXT: jae .LBB0_2
-; CHECK-NEXT: # %bb.1: # %cond_next129
+; CHECK-NEXT: cmpl $1, %eax
+; CHECK-NEXT: ja .LBB0_2
+; CHECK-NEXT: # %bb.1: # %bb77
; CHECK-NEXT: movb 0, %al
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: # kill: def $eax killed $eax def $ax
diff --git a/llvm/test/CodeGen/X86/avx-cmp.ll b/llvm/test/CodeGen/X86/avx-cmp.ll
index 2e15168..534a000 100644
--- a/llvm/test/CodeGen/X86/avx-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx-cmp.ll
@@ -26,12 +26,15 @@
define void @render() nounwind {
; CHECK-LABEL: render:
; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: pushq %rbx
+; CHECK-NEXT: pushq %rax
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jne .LBB2_6
; CHECK-NEXT: # %bb.1: # %for.cond5.preheader
; CHECK-NEXT: xorl %ebx, %ebx
+; CHECK-NEXT: movb $1, %bpl
; CHECK-NEXT: jmp .LBB2_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB2_5: # %if.then
@@ -43,8 +46,8 @@
; CHECK-NEXT: jne .LBB2_2
; CHECK-NEXT: # %bb.3: # %for.cond5
; CHECK-NEXT: # in Loop: Header=BB2_2 Depth=1
-; CHECK-NEXT: testb %bl, %bl
-; CHECK-NEXT: je .LBB2_2
+; CHECK-NEXT: testb %bpl, %bpl
+; CHECK-NEXT: jne .LBB2_2
; CHECK-NEXT: # %bb.4: # %for.body33
; CHECK-NEXT: # in Loop: Header=BB2_2 Depth=1
; CHECK-NEXT: vucomisd {{\.LCPI.*}}, %xmm0
@@ -52,7 +55,9 @@
; CHECK-NEXT: jp .LBB2_5
; CHECK-NEXT: jmp .LBB2_2
; CHECK-NEXT: .LBB2_6: # %for.end52
+; CHECK-NEXT: addq $8, %rsp
; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: popq %rbp
; CHECK-NEXT: retq
entry:
br i1 undef, label %for.cond5, label %for.end52
diff --git a/llvm/test/CodeGen/X86/avx-splat.ll b/llvm/test/CodeGen/X86/avx-splat.ll
index 4738262..e1779ac 100644
--- a/llvm/test/CodeGen/X86/avx-splat.ll
+++ b/llvm/test/CodeGen/X86/avx-splat.ll
@@ -58,7 +58,7 @@
;
define <8 x float> @funcE() nounwind {
; CHECK-LABEL: funcE:
-; CHECK: # %bb.0: # %for_exit499
+; CHECK: # %bb.0: # %allocas
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: # implicit-def: $ymm0
diff --git a/llvm/test/CodeGen/X86/avx2-vbroadcast.ll b/llvm/test/CodeGen/X86/avx2-vbroadcast.ll
index 3ae6c0b..5d7ac68 100644
--- a/llvm/test/CodeGen/X86/avx2-vbroadcast.ll
+++ b/llvm/test/CodeGen/X86/avx2-vbroadcast.ll
@@ -686,7 +686,7 @@
; X32-NEXT: ## %bb.2: ## %ret
; X32-NEXT: retl
; X32-NEXT: .p2align 4, 0x90
-; X32-NEXT: LBB33_1: ## %footer349VF
+; X32-NEXT: LBB33_1: ## %footer329VF
; X32-NEXT: ## =>This Inner Loop Header: Depth=1
; X32-NEXT: jmp LBB33_1
;
@@ -698,7 +698,7 @@
; X64-NEXT: ## %bb.2: ## %ret
; X64-NEXT: retq
; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: LBB33_1: ## %footer349VF
+; X64-NEXT: LBB33_1: ## %footer329VF
; X64-NEXT: ## =>This Inner Loop Header: Depth=1
; X64-NEXT: jmp LBB33_1
WGLoopsEntry:
diff --git a/llvm/test/CodeGen/X86/avx512-i1test.ll b/llvm/test/CodeGen/X86/avx512-i1test.ll
index df81b83..7cf86fe 100644
--- a/llvm/test/CodeGen/X86/avx512-i1test.ll
+++ b/llvm/test/CodeGen/X86/avx512-i1test.ll
@@ -7,7 +7,7 @@
define void @func() {
; CHECK-LABEL: func:
-; CHECK: # %bb.0: # %L_10
+; CHECK: # %bb.0: # %bb1
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: je .LBB0_1
@@ -70,7 +70,7 @@
; CHECK-NEXT: je .LBB1_1
; CHECK-NEXT: # %bb.2: # %if.then
; CHECK-NEXT: jmp bar # TAILCALL
-; CHECK-NEXT: .LBB1_1: # %return
+; CHECK-NEXT: .LBB1_1: # %if.end
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orq $-2, %rax
; CHECK-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/block-placement.ll b/llvm/test/CodeGen/X86/block-placement.ll
index d97e367..a9d76cf 100644
--- a/llvm/test/CodeGen/X86/block-placement.ll
+++ b/llvm/test/CodeGen/X86/block-placement.ll
@@ -317,7 +317,7 @@
; a function. This is a gross CFG reduced out of the single source GCC.
; CHECK-LABEL: unnatural_cfg1
; CHECK: %entry
-; CHECK: %loop.body1
+; CHECK: %loop.header
; CHECK: %loop.body2
; CHECK: %loop.body3
@@ -611,7 +611,7 @@
; CHECK-LABEL: test_unnatural_cfg_backwards_inner_loop
; CHECK: %entry
; CHECK: %loop2b
-; CHECK: %loop1
+; CHECK: %loop3
entry:
br i1 undef, label %loop2a, label %body
diff --git a/llvm/test/CodeGen/X86/hoist-spill.ll b/llvm/test/CodeGen/X86/hoist-spill.ll
index 03f558f..6a3f5ca 100644
--- a/llvm/test/CodeGen/X86/hoist-spill.ll
+++ b/llvm/test/CodeGen/X86/hoist-spill.ll
@@ -48,9 +48,6 @@
%cmp326 = icmp sgt i32 %k.0, %p1
br i1 %cmp326, label %for.cond4.preheader, label %for.body.preheader
-for.body.preheader: ; preds = %for.cond
- br label %for.body
-
for.cond4.preheader: ; preds = %for.body, %for.cond
%k.1.lcssa = phi i32 [ %k.0, %for.cond ], [ %add, %for.body ]
%cmp528 = icmp sgt i32 %sub., %p1
@@ -95,6 +92,9 @@
middle.block: ; preds = %vector.body, %vector.body.preheader.split
br i1 undef, label %for.inc14, label %for.body6
+for.body.preheader: ; preds = %for.cond
+ br label %for.body
+
for.body: ; preds = %for.body, %for.body.preheader
%k.127 = phi i32 [ %k.0, %for.body.preheader ], [ %add, %for.body ]
%add = add nsw i32 %k.127, 1
diff --git a/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll b/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll
index 3112e1a..98af189 100644
--- a/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll
+++ b/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll
@@ -3,7 +3,7 @@
define fastcc i32 @t() nounwind {
; CHECK-LABEL: t:
-; CHECK: # %bb.0: # %walkExprTree.exit
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl 0, %eax
; CHECK-NEXT: orl $2, %eax
; CHECK-NEXT: movw %ax, 0
diff --git a/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll b/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
index 1c47017..785ba40 100644
--- a/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
+++ b/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
@@ -8,7 +8,7 @@
define zeroext i1 @opeq1(
; X86-LABEL: opeq1:
-; X86: # %bb.0: # %opeq1.exit
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %edx
@@ -20,7 +20,7 @@
; X86-NEXT: retl
;
; X64-LABEL: opeq1:
-; X64: # %bb.0: # %opeq1.exit
+; X64: # %bb.0: # %entry
; X64-NEXT: movq (%rdi), %rax
; X64-NEXT: cmpq (%rsi), %rax
; X64-NEXT: sete %al
diff --git a/llvm/test/CodeGen/X86/pr32108.ll b/llvm/test/CodeGen/X86/pr32108.ll
index ff1b7d3..bde5daf 100644
--- a/llvm/test/CodeGen/X86/pr32108.ll
+++ b/llvm/test/CodeGen/X86/pr32108.ll
@@ -3,7 +3,7 @@
define void @pr32108() {
; CHECK-LABEL: pr32108:
-; CHECK: # %bb.0: # %CF257
+; CHECK: # %bb.0: # %BB
; CHECK-NEXT: movb $0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_1: # %CF244
diff --git a/llvm/test/CodeGen/X86/setcc-lowering.ll b/llvm/test/CodeGen/X86/setcc-lowering.ll
index 11e453e..ce057b2 100644
--- a/llvm/test/CodeGen/X86/setcc-lowering.ll
+++ b/llvm/test/CodeGen/X86/setcc-lowering.ll
@@ -43,7 +43,7 @@
define void @pr26232(i64 %a, <16 x i1> %b) {
; AVX-LABEL: pr26232:
-; AVX: # %bb.0: # %for_loop599.preheader
+; AVX: # %bb.0: # %allocas
; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
; AVX-NEXT: .p2align 4, 0x90
@@ -64,7 +64,7 @@
; AVX-NEXT: retq
;
; KNL-32-LABEL: pr26232:
-; KNL-32: # %bb.0: # %for_loop599.preheader
+; KNL-32: # %bb.0: # %allocas
; KNL-32-NEXT: pushl %esi
; KNL-32-NEXT: .cfi_def_cfa_offset 8
; KNL-32-NEXT: .cfi_offset %esi, -8
diff --git a/llvm/test/CodeGen/X86/split-store.ll b/llvm/test/CodeGen/X86/split-store.ll
index 6423890..575f46c 100644
--- a/llvm/test/CodeGen/X86/split-store.ll
+++ b/llvm/test/CodeGen/X86/split-store.ll
@@ -232,7 +232,7 @@
define void @mbb_int32_float_pair(i32 %tmp1, float %tmp2, i64* %ref.tmp) {
; CHECK-LABEL: mbb_int32_float_pair:
-; CHECK: # %bb.0: # %next
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl %edi, (%rsi)
; CHECK-NEXT: movss %xmm0, 4(%rsi)
; CHECK-NEXT: retq
@@ -250,7 +250,7 @@
define void @mbb_int32_float_multi_stores(i32 %tmp1, float %tmp2, i64* %ref.tmp, i64* %ref.tmp1, i1 %cmp) {
; CHECK-LABEL: mbb_int32_float_multi_stores:
-; CHECK: # %bb.0: # %bb1
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl %edi, (%rsi)
; CHECK-NEXT: movss %xmm0, 4(%rsi)
; CHECK-NEXT: testb $1, %cl
diff --git a/llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll b/llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
index 736a6d8..2f9cc47 100644
--- a/llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
@@ -10,7 +10,7 @@
; CHECK-NOT: # %{{[a-zA-Z_]+}}
; CHECK: # %inner_loop_latch
; CHECK-NOT: # %{{[a-zA-Z_]+}}
-; CHECK: # %inner_loop_test
+; CHECK: # %inner_loop_top
; CHECK-NOT: # %{{[a-zA-Z_]+}}
; CHECK: # %exit
define void @tail_dup_merge_loops(i32 %a, i8* %b, i8* %c) local_unnamed_addr #0 {
diff --git a/llvm/test/DebugInfo/Generic/sunk-compare.ll b/llvm/test/DebugInfo/Generic/sunk-compare.ll
index 9ccf382..279887b 100644
--- a/llvm/test/DebugInfo/Generic/sunk-compare.ll
+++ b/llvm/test/DebugInfo/Generic/sunk-compare.ll
@@ -8,7 +8,7 @@
; We check that the compare instruction retains its debug loc after
; it is sunk into other.bb by the codegen prepare pass.
;
-; CHECK: other.bb:
+; CHECK: entry:
; CHECK-NEXT: icmp{{.*}}%x, 0, !dbg ![[MDHANDLE:[0-9]*]]
; CHECK: ![[MDHANDLE]] = !DILocation(line: 2
;
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll b/llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
index 00a4df9..cf04559 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
@@ -168,7 +168,7 @@
; the block it terminates.
define void @loop(i64* nocapture readonly %p) {
; CHECK-LABEL: @loop(
-; CHECK-NEXT: bb0.clone:
+; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
; CHECK: bb0:
; CHECK-NEXT: br label [[DOTSPLIT]]
diff --git a/llvm/test/Transforms/CodeGenPrepare/basic.ll b/llvm/test/Transforms/CodeGenPrepare/basic.ll
index 2e58de7..b8ca6d6 100644
--- a/llvm/test/Transforms/CodeGenPrepare/basic.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/basic.ll
@@ -13,7 +13,7 @@
%1 = icmp ugt i64 %0, 3
br i1 %1, label %T, label %trap
-; CHECK: T:
+; CHECK: entry:
; CHECK-NOT: br label %
trap: ; preds = %0, %entry
diff --git a/llvm/test/Transforms/LoopSimplifyCFG/scev.ll b/llvm/test/Transforms/LoopSimplifyCFG/scev.ll
index a2e8e5c..c0c5ec1 100644
--- a/llvm/test/Transforms/LoopSimplifyCFG/scev.ll
+++ b/llvm/test/Transforms/LoopSimplifyCFG/scev.ll
@@ -6,22 +6,22 @@
define void @t_run_test() {
; CHECK-LABEL: @t_run_test(
; CHECK-NEXT: entry:
-; CHECK-NEXT: br label [[LOOP_PH:%.*]]
-; CHECK: loop.ph:
-; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
-; CHECK: loop.body:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[LOOP_PH]] ], [ [[INC:%.*]], [[LOOP_BODY]] ]
+; CHECK-NEXT: br label %[[LOOP_PH:.*]]
+; CHECK: [[LOOP_PH]]:
+; CHECK-NEXT: br label %[[LOOP_BODY:.*]]
+; CHECK: [[LOOP_BODY]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[LOOP_PH]] ], [ [[INC:%.*]], %[[LOOP_BODY]] ]
; CHECK-NEXT: [[INC]] = add i32 [[IV]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[INC]], 10
-; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_BODY]], label [[EXIT:%.*]]
-; CHECK: exit:
-; CHECK-NEXT: br label [[LOOP_BODY2:%.*]]
-; CHECK: loop.body2:
-; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 0, [[EXIT]] ], [ [[INC2:%.*]], [[LOOP_BODY2]] ]
+; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_BODY]], label %[[EXIT:.*]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: br label %[[LOOP_BODY2:.*]]
+; CHECK: [[LOOP_BODY2]]:
+; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 0, %[[EXIT]] ], [ [[INC2:%.*]], %[[LOOP_BODY2]] ]
; CHECK-NEXT: [[INC2]] = add i32 [[IV2]], 1
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[INC2]], 10
-; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP_BODY2]], label [[EXIT2:%.*]]
-; CHECK: exit2:
+; CHECK-NEXT: br i1 [[CMP2]], label %[[LOOP_BODY2]], label %[[EXIT2:.*]]
+; CHECK: [[EXIT2]]:
; CHECK-NEXT: ret void
;
entry:
diff --git a/llvm/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll b/llvm/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll
index 56ff69c..7768c62 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll
@@ -44,7 +44,7 @@
; CHECK: @main
; Check that the loop preheader contains no address computation.
-; CHECK: %end_of_chain
+; CHECK: %while.cond.i.i
; CHECK-NOT: add{{.*}}lsl
; CHECK: ldr{{.*}}lsl #2
; CHECK: ldr{{.*}}lsl #2
diff --git a/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
index e492f2c..2e32d91 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
@@ -96,7 +96,8 @@
; itself a phi.
;
; CHECK: @test3
-; CHECK: %for.body3.lr.ph.us.i.loopexit
+; CHECK: %meshBB1
+; CHECK: %meshBB
; CHECK-NEXT: Parent Loop
; CHECK-NEXT: Inner Loop
; CHECK-NEXT: incq
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-iteration.ll b/llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-iteration.ll
index 7ccd89a..6c409e4 100644
--- a/llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-iteration.ll
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-iteration.ll
@@ -13,7 +13,7 @@
; CHECK-NEXT: br i1 %{{.*}}, label %entry.split.split, label %loop_exit
;
; CHECK: entry.split.split:
-; CHECK-NEXT: br label %do_something
+; CHECK-NEXT: br label %loop_begin
loop_begin:
br i1 %cond1, label %continue, label %loop_exit ; first trivial condition
@@ -27,9 +27,9 @@
do_something:
call void @some_func() noreturn nounwind
br label %loop_begin
-; CHECK: do_something:
+; CHECK: loop_begin:
; CHECK-NEXT: call
-; CHECK-NEXT: br label %do_something
+; CHECK-NEXT: br label %loop_begin
loop_exit:
ret i32 0
@@ -38,4 +38,4 @@
;
; CHECK: loop_exit.split:
; CHECK-NEXT: ret
-}
\ No newline at end of file
+}