[RISCV] Hard float ABI support

The RISC-V hard float calling convention requires the frontend to:

* Detect cases where, once "flattened", a struct can be passed using
int+fp or fp+fp registers under the hard float ABI and coerce to the
appropriate type(s)
* Track usage of GPRs and FPRs in order to gate the above, and to
determine when signext/zeroext attributes must be added to integer
scalars

This patch attempts to do this in compliance with the documented ABI,
and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as
author of that code I've tagged you as reviewer for initial feedback on
my usage.

Note that a previous version of the ABI indicated that when passing an
int+fp struct using a GPR+FPR, the int would need to be sign or
zero-extended appropriately. GCC never did this and the ABI was changed,
which makes life easier as ABIArgInfo::CoerceAndExpand can't currently
handle sign/zero-extension attributes.

Re-landed after backing out 366450 due to missed hunks.

Differential Revision: https://reviews.llvm.org/D60456

llvm-svn: 366480
14 files changed
tree: 9bb3bc093067c460e63ac4e4260962871ea01699
  1. clang/
  2. clang-tools-extra/
  3. compiler-rt/
  4. debuginfo-tests/
  5. libclc/
  6. libcxx/
  7. libcxxabi/
  8. libunwind/
  9. lld/
  10. lldb/
  11. llgo/
  12. llvm/
  13. openmp/
  14. parallel-libs/
  15. polly/
  16. pstl/
  17. .arcconfig
  18. .clang-format
  19. .clang-tidy
  20. .gitignore
  21. README.md
README.md

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