AMDGPU: Implement hasBitPreservingFPLogic
llvm-svn: 315754
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 2bc3d7f..82d1bc2 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3107,6 +3107,10 @@
}
}
+bool SITargetLowering::hasBitPreservingFPLogic(EVT VT) const {
+ return isTypeLegal(VT.getScalarType());
+}
+
bool SITargetLowering::enableAggressiveFMAFusion(EVT VT) const {
// This currently forces unfolding various combinations of fsub into fma with
// free fneg'd operands. As long as we have fast FMA (controlled by