[RISCV] Support z and i operand modifiers
Differential Revision: https://reviews.llvm.org/D57792
Patch by James Clarke.
llvm-svn: 365291
diff --git a/llvm/test/CodeGen/RISCV/inline-asm.ll b/llvm/test/CodeGen/RISCV/inline-asm.ll
index 31d2676..10f8a34 100644
--- a/llvm/test/CodeGen/RISCV/inline-asm.ll
+++ b/llvm/test/CodeGen/RISCV/inline-asm.ll
@@ -150,4 +150,49 @@
ret void
}
+define i32 @modifier_z_zero(i32 %a) nounwind {
+; RV32I-LABEL: modifier_z_zero:
+; RV32I: # %bb.0:
+; RV32I-NEXT: #APP
+; RV32I-NEXT: add a0, a0, zero
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+ %1 = tail call i32 asm "add $0, $1, ${2:z}", "=r,r,r"(i32 %a, i32 0)
+ ret i32 %1
+}
+
+define i32 @modifier_z_nonzero(i32 %a) nounwind {
+; RV32I-LABEL: modifier_z_nonzero:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi a1, zero, 1
+; RV32I-NEXT: #APP
+; RV32I-NEXT: add a0, a0, a1
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+ %1 = tail call i32 asm "add $0, $1, ${2:z}", "=r,r,r"(i32 %a, i32 1)
+ ret i32 %1
+}
+
+define i32 @modifier_i_imm(i32 %a) nounwind {
+; RV32I-LABEL: modifier_i_imm:
+; RV32I: # %bb.0:
+; RV32I-NEXT: #APP
+; RV32I-NEXT: addi a0, a0, 1
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+ %1 = tail call i32 asm "add${2:i} $0, $1, $2", "=r,r,ri"(i32 %a, i32 1)
+ ret i32 %1
+}
+
+define i32 @modifier_i_reg(i32 %a, i32 %b) nounwind {
+; RV32I-LABEL: modifier_i_reg:
+; RV32I: # %bb.0:
+; RV32I-NEXT: #APP
+; RV32I-NEXT: add a0, a0, a1
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+ %1 = tail call i32 asm "add${2:i} $0, $1, $2", "=r,r,ri"(i32 %a, i32 %b)
+ ret i32 %1
+}
+
; TODO: expend tests for more complex constraints, out of range immediates etc