Revert r281336 (and r281337), it caused PR30372.
llvm-svn: 281361
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 23cfd36..23e3677 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -2702,6 +2702,7 @@
}
if (getLexer().isNot(AsmToken::EndOfStatement)) {
+ Parser.eatToEndOfStatement();
return TokError("unexpected token in argument list");
}
@@ -3321,6 +3322,8 @@
// IC, DC, AT, and TLBI instructions are aliases for the SYS instruction.
if (Head == "ic" || Head == "dc" || Head == "at" || Head == "tlbi") {
bool IsError = parseSysAlias(Head, NameLoc, Operands);
+ if (IsError && getLexer().isNot(AsmToken::EndOfStatement))
+ Parser.eatToEndOfStatement();
return IsError;
}
@@ -3377,6 +3380,7 @@
if (getLexer().isNot(AsmToken::EndOfStatement)) {
// Read the first operand.
if (parseOperand(Operands, false, false)) {
+ Parser.eatToEndOfStatement();
return true;
}
@@ -3389,6 +3393,7 @@
(N == 3 && condCodeThirdOperand) ||
(N == 2 && condCodeSecondOperand),
condCodeSecondOperand || condCodeThirdOperand)) {
+ Parser.eatToEndOfStatement();
return true;
}
@@ -3420,6 +3425,7 @@
if (getLexer().isNot(AsmToken::EndOfStatement)) {
SMLoc Loc = Parser.getTok().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
@@ -4177,10 +4183,8 @@
if (IDVal == ".inst")
return parseDirectiveInst(Loc);
}
- if (IDVal == MCLOHDirectiveName())
- return parseDirectiveLOH(IDVal, Loc);
- return true;
+ return parseDirectiveLOH(IDVal, Loc);
}
static const struct {
@@ -4341,6 +4345,7 @@
bool AArch64AsmParser::parseDirectiveInst(SMLoc Loc) {
MCAsmParser &Parser = getParser();
if (getLexer().is(AsmToken::EndOfStatement)) {
+ Parser.eatToEndOfStatement();
Error(Loc, "expected expression following directive");
return false;
}
@@ -4398,6 +4403,8 @@
/// ::= .loh <lohName | lohId> label1, ..., labelN
/// The number of arguments depends on the loh identifier.
bool AArch64AsmParser::parseDirectiveLOH(StringRef IDVal, SMLoc Loc) {
+ if (IDVal != MCLOHDirectiveName())
+ return true;
MCLOHType Kind;
if (getParser().getTok().isNot(AsmToken::Identifier)) {
if (getParser().getTok().isNot(AsmToken::Integer))
@@ -4405,10 +4412,8 @@
// We successfully get a numeric value for the identifier.
// Check if it is valid.
int64_t Id = getParser().getTok().getIntVal();
- if (Id <= -1U && !isValidMCLOHType(Id)) {
- TokError("invalid numeric identifier in directive");
- return false;
- }
+ if (Id <= -1U && !isValidMCLOHType(Id))
+ return TokError("invalid numeric identifier in directive");
Kind = (MCLOHType)Id;
} else {
StringRef Name = getTok().getIdentifier();
@@ -4466,18 +4471,25 @@
if (RegNum == static_cast<unsigned>(-1)) {
StringRef Kind;
RegNum = tryMatchVectorRegister(Kind, false);
- if (!Kind.empty())
- return Error(SRegLoc, "vector register without type specifier expected");
+ if (!Kind.empty()) {
+ Error(SRegLoc, "vector register without type specifier expected");
+ return false;
+ }
IsVector = true;
}
- if (RegNum == static_cast<unsigned>(-1))
- return Error(SRegLoc, "register name or alias expected");
+ if (RegNum == static_cast<unsigned>(-1)) {
+ Parser.eatToEndOfStatement();
+ Error(SRegLoc, "register name or alias expected");
+ return false;
+ }
// Shouldn't be anything else.
- if (Parser.getTok().isNot(AsmToken::EndOfStatement))
- return Error(Parser.getTok().getLoc(),
- "unexpected input in .req directive");
+ if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
+ Error(Parser.getTok().getLoc(), "unexpected input in .req directive");
+ Parser.eatToEndOfStatement();
+ return false;
+ }
Parser.Lex(); // Consume the EndOfStatement
@@ -4485,7 +4497,7 @@
if (RegisterReqs.insert(std::make_pair(Name, pair)).first->second != pair)
Warning(L, "ignoring redefinition of register alias '" + Name + "'");
- return false;
+ return true;
}
/// parseDirectiveUneq
@@ -4494,6 +4506,7 @@
MCAsmParser &Parser = getParser();
if (Parser.getTok().isNot(AsmToken::Identifier)) {
Error(Parser.getTok().getLoc(), "unexpected input in .unreq directive.");
+ Parser.eatToEndOfStatement();
return false;
}
RegisterReqs.erase(Parser.getTok().getIdentifier().lower());
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index ffff0e5..2b6fda0 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -339,14 +339,16 @@
return;
}
- void Note(SMLoc L, const Twine &Msg, SMRange Range = None) {
- return getParser().Note(L, Msg, Range);
+ void Note(SMLoc L, const Twine &Msg, ArrayRef<SMRange> Ranges = None) {
+ return getParser().Note(L, Msg, Ranges);
}
- bool Warning(SMLoc L, const Twine &Msg, SMRange Range = None) {
- return getParser().Warning(L, Msg, Range);
+ bool Warning(SMLoc L, const Twine &Msg,
+ ArrayRef<SMRange> Ranges = None) {
+ return getParser().Warning(L, Msg, Ranges);
}
- bool Error(SMLoc L, const Twine &Msg, SMRange Range = None) {
- return getParser().Error(L, Msg, Range);
+ bool Error(SMLoc L, const Twine &Msg,
+ ArrayRef<SMRange> Ranges = None) {
+ return getParser().Error(L, Msg, Ranges);
}
bool validatetLDMRegList(const MCInst &Inst, const OperandVector &Operands,
@@ -6006,6 +6008,7 @@
// In Thumb1, only the branch (B) instruction can be predicated.
if (isThumbOne() && PredicationCode != ARMCC::AL && Mnemonic != "b") {
+ Parser.eatToEndOfStatement();
return Error(NameLoc, "conditional execution not supported in Thumb1");
}
@@ -6019,12 +6022,14 @@
if (Mnemonic == "it") {
SMLoc Loc = SMLoc::getFromPointer(NameLoc.getPointer() + 2);
if (ITMask.size() > 3) {
+ Parser.eatToEndOfStatement();
return Error(Loc, "too many conditions on IT instruction");
}
unsigned Mask = 8;
for (unsigned i = ITMask.size(); i != 0; --i) {
char pos = ITMask[i - 1];
if (pos != 't' && pos != 'e') {
+ Parser.eatToEndOfStatement();
return Error(Loc, "illegal IT block condition mask '" + ITMask + "'");
}
Mask >>= 1;
@@ -6050,12 +6055,14 @@
// If we had a carry-set on an instruction that can't do that, issue an
// error.
if (!CanAcceptCarrySet && CarrySetting) {
+ Parser.eatToEndOfStatement();
return Error(NameLoc, "instruction '" + Mnemonic +
"' can not set flags, but 's' suffix specified");
}
// If we had a predication code on an instruction that can't do that, issue an
// error.
if (!CanAcceptPredicationCode && PredicationCode != ARMCC::AL) {
+ Parser.eatToEndOfStatement();
return Error(NameLoc, "instruction '" + Mnemonic +
"' is not predicable, but condition code specified");
}
@@ -6099,6 +6106,7 @@
// For for ARM mode generate an error if the .n qualifier is used.
if (ExtraToken == ".n" && !isThumb()) {
SMLoc Loc = SMLoc::getFromPointer(NameLoc.getPointer() + Start);
+ Parser.eatToEndOfStatement();
return Error(Loc, "instruction with .n (narrow) qualifier not allowed in "
"arm mode");
}
@@ -6116,6 +6124,7 @@
if (getLexer().isNot(AsmToken::EndOfStatement)) {
// Read the first operand.
if (parseOperand(Operands, Mnemonic)) {
+ Parser.eatToEndOfStatement();
return true;
}
@@ -6124,13 +6133,16 @@
// Parse and remember the operand.
if (parseOperand(Operands, Mnemonic)) {
+ Parser.eatToEndOfStatement();
return true;
}
}
}
if (getLexer().isNot(AsmToken::EndOfStatement)) {
- return TokError("unexpected token in argument list");
+ SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
+ return Error(Loc, "unexpected token in argument list");
}
Parser.Lex(); // Consume the EndOfStatement
@@ -9322,6 +9334,7 @@
for (;;) {
const MCExpr *Value;
if (getParser().parseExpression(Value)) {
+ Parser.eatToEndOfStatement();
return false;
}
@@ -9424,6 +9437,7 @@
if (getLexer().isNot(AsmToken::EndOfStatement)) {
Error(Parser.getTok().getLoc(), "unexpected token in directive");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -9516,12 +9530,14 @@
unsigned Reg;
SMLoc SRegLoc, ERegLoc;
if (ParseRegister(Reg, SRegLoc, ERegLoc)) {
+ Parser.eatToEndOfStatement();
Error(SRegLoc, "register name expected");
return false;
}
// Shouldn't be anything else.
if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
+ Parser.eatToEndOfStatement();
Error(Parser.getTok().getLoc(), "unexpected input in .req directive.");
return false;
}
@@ -9541,6 +9557,7 @@
bool ARMAsmParser::parseDirectiveUnreq(SMLoc L) {
MCAsmParser &Parser = getParser();
if (Parser.getTok().isNot(AsmToken::Identifier)) {
+ Parser.eatToEndOfStatement();
Error(L, "unexpected input in .unreq directive.");
return false;
}
@@ -9610,6 +9627,7 @@
Tag = ARMBuildAttrs::AttrTypeFromString(Name);
if (Tag == -1) {
Error(TagLoc, "attribute name not recognised: " + Name);
+ Parser.eatToEndOfStatement();
return false;
}
Parser.Lex();
@@ -9618,12 +9636,14 @@
TagLoc = Parser.getTok().getLoc();
if (Parser.parseExpression(AttrExpr)) {
+ Parser.eatToEndOfStatement();
return false;
}
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(AttrExpr);
if (!CE) {
Error(TagLoc, "expected numeric constant");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -9632,6 +9652,7 @@
if (Parser.getTok().isNot(AsmToken::Comma)) {
Error(Parser.getTok().getLoc(), "comma expected");
+ Parser.eatToEndOfStatement();
return false;
}
Parser.Lex(); // skip comma
@@ -9658,12 +9679,14 @@
const MCExpr *ValueExpr;
SMLoc ValueExprLoc = Parser.getTok().getLoc();
if (Parser.parseExpression(ValueExpr)) {
+ Parser.eatToEndOfStatement();
return false;
}
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ValueExpr);
if (!CE) {
Error(ValueExprLoc, "expected numeric constant");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -9675,6 +9698,7 @@
IsStringValue = false;
if (Parser.getTok().isNot(AsmToken::Comma)) {
Error(Parser.getTok().getLoc(), "comma expected");
+ Parser.eatToEndOfStatement();
return false;
} else {
Parser.Lex();
@@ -9684,6 +9708,7 @@
if (IsStringValue) {
if (Parser.getTok().isNot(AsmToken::String)) {
Error(Parser.getTok().getLoc(), "bad string constant");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -9827,6 +9852,7 @@
return false;
}
if (HasExistingPersonality) {
+ Parser.eatToEndOfStatement();
Error(L, "multiple personality directives");
UC.emitPersonalityLocNotes();
return false;
@@ -9834,6 +9860,7 @@
// Parse the name of the personality routine
if (Parser.getTok().isNot(AsmToken::Identifier)) {
+ Parser.eatToEndOfStatement();
Error(L, "unexpected input in .personality directive.");
return false;
}
@@ -10033,12 +10060,14 @@
Width = 4;
break;
default:
+ Parser.eatToEndOfStatement();
Error(Loc, "cannot determine Thumb instruction size, "
"use inst.n/inst.w instead");
return false;
}
} else {
if (Suffix) {
+ Parser.eatToEndOfStatement();
Error(Loc, "width suffixes are invalid in ARM mode");
return false;
}
@@ -10046,6 +10075,7 @@
}
if (getLexer().is(AsmToken::EndOfStatement)) {
+ Parser.eatToEndOfStatement();
Error(Loc, "expected expression following directive");
return false;
}
@@ -10137,20 +10167,24 @@
UC.recordPersonalityIndex(L);
if (!UC.hasFnStart()) {
+ Parser.eatToEndOfStatement();
Error(L, ".fnstart must precede .personalityindex directive");
return false;
}
if (UC.cantUnwind()) {
+ Parser.eatToEndOfStatement();
Error(L, ".personalityindex cannot be used with .cantunwind");
UC.emitCantUnwindLocNotes();
return false;
}
if (UC.hasHandlerData()) {
+ Parser.eatToEndOfStatement();
Error(L, ".personalityindex must precede .handlerdata directive");
UC.emitHandlerDataLocNotes();
return false;
}
if (HasExistingPersonality) {
+ Parser.eatToEndOfStatement();
Error(L, "multiple personality directives");
UC.emitPersonalityLocNotes();
return false;
@@ -10159,16 +10193,19 @@
const MCExpr *IndexExpression;
SMLoc IndexLoc = Parser.getTok().getLoc();
if (Parser.parseExpression(IndexExpression)) {
+ Parser.eatToEndOfStatement();
return false;
}
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(IndexExpression);
if (!CE) {
+ Parser.eatToEndOfStatement();
Error(IndexLoc, "index must be a constant number");
return false;
}
if (CE->getValue() < 0 ||
CE->getValue() >= ARM::EHABI::NUM_PERSONALITY_INDEX) {
+ Parser.eatToEndOfStatement();
Error(IndexLoc, "personality routine index should be in range [0-3]");
return false;
}
@@ -10182,6 +10219,7 @@
bool ARMAsmParser::parseDirectiveUnwindRaw(SMLoc L) {
MCAsmParser &Parser = getParser();
if (!UC.hasFnStart()) {
+ Parser.eatToEndOfStatement();
Error(L, ".fnstart must precede .unwind_raw directives");
return false;
}
@@ -10193,12 +10231,14 @@
if (getLexer().is(AsmToken::EndOfStatement) ||
getParser().parseExpression(OffsetExpr)) {
Error(OffsetLoc, "expected expression");
+ Parser.eatToEndOfStatement();
return false;
}
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(OffsetExpr);
if (!CE) {
Error(OffsetLoc, "offset must be a constant");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -10206,6 +10246,7 @@
if (getLexer().isNot(AsmToken::Comma)) {
Error(getLexer().getLoc(), "expected comma");
+ Parser.eatToEndOfStatement();
return false;
}
Parser.Lex();
@@ -10217,18 +10258,21 @@
SMLoc OpcodeLoc = getLexer().getLoc();
if (getLexer().is(AsmToken::EndOfStatement) || Parser.parseExpression(OE)) {
Error(OpcodeLoc, "expected opcode expression");
+ Parser.eatToEndOfStatement();
return false;
}
const MCConstantExpr *OC = dyn_cast<MCConstantExpr>(OE);
if (!OC) {
Error(OpcodeLoc, "opcode value must be a constant");
+ Parser.eatToEndOfStatement();
return false;
}
const int64_t Opcode = OC->getValue();
if (Opcode & ~0xff) {
Error(OpcodeLoc, "invalid opcode");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -10239,6 +10283,7 @@
if (getLexer().isNot(AsmToken::Comma)) {
Error(getLexer().getLoc(), "unexpected token in directive");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -10258,6 +10303,7 @@
if (getLexer().isNot(AsmToken::Identifier)) {
TokError("expected variable after '.tlsdescseq' directive");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -10268,6 +10314,7 @@
if (getLexer().isNot(AsmToken::EndOfStatement)) {
Error(Parser.getTok().getLoc(), "unexpected token");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -10280,10 +10327,12 @@
bool ARMAsmParser::parseDirectiveMovSP(SMLoc L) {
MCAsmParser &Parser = getParser();
if (!UC.hasFnStart()) {
+ Parser.eatToEndOfStatement();
Error(L, ".fnstart must precede .movsp directives");
return false;
}
if (UC.getFPReg() != ARM::SP) {
+ Parser.eatToEndOfStatement();
Error(L, "unexpected .movsp directive");
return false;
}
@@ -10291,11 +10340,13 @@
SMLoc SPRegLoc = Parser.getTok().getLoc();
int SPReg = tryParseRegister();
if (SPReg == -1) {
+ Parser.eatToEndOfStatement();
Error(SPRegLoc, "register expected");
return false;
}
if (SPReg == ARM::SP || SPReg == ARM::PC) {
+ Parser.eatToEndOfStatement();
Error(SPRegLoc, "sp and pc are not permitted in .movsp directive");
return false;
}
@@ -10306,6 +10357,7 @@
if (Parser.getTok().isNot(AsmToken::Hash)) {
Error(Parser.getTok().getLoc(), "expected #constant");
+ Parser.eatToEndOfStatement();
return false;
}
Parser.Lex();
@@ -10313,12 +10365,14 @@
const MCExpr *OffsetExpr;
SMLoc OffsetLoc = Parser.getTok().getLoc();
if (Parser.parseExpression(OffsetExpr)) {
+ Parser.eatToEndOfStatement();
Error(OffsetLoc, "malformed offset expression");
return false;
}
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(OffsetExpr);
if (!CE) {
+ Parser.eatToEndOfStatement();
Error(OffsetLoc, "offset must be an immediate constant");
return false;
}
@@ -10338,6 +10392,7 @@
MCAsmParser &Parser = getParser();
if (getLexer().isNot(AsmToken::Identifier)) {
Error(getLexer().getLoc(), "unexpected token");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -10349,6 +10404,7 @@
if (ID == ARM::AK_INVALID) {
Error(ArchLoc, "unknown architecture '" + Arch + "'");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -10356,6 +10412,7 @@
if (getLexer().isNot(AsmToken::EndOfStatement)) {
Error(getLexer().getLoc(), "unexpected token");
+ Parser.eatToEndOfStatement();
}
return false;
@@ -10388,11 +10445,13 @@
StringRef Name;
if (Parser.parseIdentifier(Name)) {
TokError("expected identifier after '.thumb_set'");
+ Parser.eatToEndOfStatement();
return false;
}
if (getLexer().isNot(AsmToken::Comma)) {
TokError("expected comma after name '" + Name + "'");
+ Parser.eatToEndOfStatement();
return false;
}
Lex();
@@ -10456,6 +10515,7 @@
if (getLexer().isNot(AsmToken::Identifier)) {
Error(getLexer().getLoc(), "expected architecture extension name");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -10501,6 +10561,7 @@
}
Error(ExtLoc, "unknown architectural extension: " + Name);
+ Parser.eatToEndOfStatement();
return false;
}
diff --git a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
index 9ce858f..ba4dfab 100644
--- a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
+++ b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
@@ -114,7 +114,7 @@
uint64_t &ErrorInfo, bool MatchingInlineAsm) override;
unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind) override;
- bool OutOfRange(SMLoc IDLoc, long long Val, long long Max);
+ void OutOfRange(SMLoc IDLoc, long long Val, long long Max);
int processInstruction(MCInst &Inst, OperandVector const &Operands,
SMLoc IDLoc);
@@ -637,63 +637,60 @@
uint64_t Err = Check.getError();
if (Err != HexagonMCErrInfo::CHECK_SUCCESS) {
if (HexagonMCErrInfo::CHECK_ERROR_BRANCHES & Err)
- return Error(
- IDLoc,
- "unconditional branch cannot precede another branch in packet");
+ Error(IDLoc,
+ "unconditional branch cannot precede another branch in packet");
if (HexagonMCErrInfo::CHECK_ERROR_NEWP & Err ||
HexagonMCErrInfo::CHECK_ERROR_NEWV & Err)
- return Error(IDLoc, "register `" + R +
- "' used with `.new' "
- "but not validly modified in the same packet");
+ Error(IDLoc, "register `" + R +
+ "' used with `.new' "
+ "but not validly modified in the same packet");
if (HexagonMCErrInfo::CHECK_ERROR_REGISTERS & Err)
- return Error(IDLoc, "register `" + R + "' modified more than once");
+ Error(IDLoc, "register `" + R + "' modified more than once");
if (HexagonMCErrInfo::CHECK_ERROR_READONLY & Err)
- return Error(IDLoc, "cannot write to read-only register `" + R + "'");
+ Error(IDLoc, "cannot write to read-only register `" + R + "'");
if (HexagonMCErrInfo::CHECK_ERROR_LOOP & Err)
- return Error(IDLoc, "loop-setup and some branch instructions "
- "cannot be in the same packet");
+ Error(IDLoc, "loop-setup and some branch instructions "
+ "cannot be in the same packet");
if (HexagonMCErrInfo::CHECK_ERROR_ENDLOOP & Err) {
Twine N(HexagonMCInstrInfo::isInnerLoop(MCB) ? '0' : '1');
- return Error(IDLoc,
- "packet marked with `:endloop" + N + "' " +
+ Error(IDLoc, "packet marked with `:endloop" + N + "' " +
"cannot contain instructions that modify register " +
"`" + R + "'");
}
if (HexagonMCErrInfo::CHECK_ERROR_SOLO & Err)
- return Error(
- IDLoc,
- "instruction cannot appear in packet with other instructions");
+ Error(IDLoc,
+ "instruction cannot appear in packet with other instructions");
if (HexagonMCErrInfo::CHECK_ERROR_NOSLOTS & Err)
- return Error(IDLoc, "too many slots used in packet");
+ Error(IDLoc, "too many slots used in packet");
if (Err & HexagonMCErrInfo::CHECK_ERROR_SHUFFLE) {
uint64_t Erm = Check.getShuffleError();
if (HexagonShuffler::SHUFFLE_ERROR_INVALID == Erm)
- return Error(IDLoc, "invalid instruction packet");
+ Error(IDLoc, "invalid instruction packet");
else if (HexagonShuffler::SHUFFLE_ERROR_STORES == Erm)
- return Error(IDLoc, "invalid instruction packet: too many stores");
+ Error(IDLoc, "invalid instruction packet: too many stores");
else if (HexagonShuffler::SHUFFLE_ERROR_LOADS == Erm)
- return Error(IDLoc, "invalid instruction packet: too many loads");
+ Error(IDLoc, "invalid instruction packet: too many loads");
else if (HexagonShuffler::SHUFFLE_ERROR_BRANCHES == Erm)
- return Error(IDLoc, "too many branches in packet");
+ Error(IDLoc, "too many branches in packet");
else if (HexagonShuffler::SHUFFLE_ERROR_NOSLOTS == Erm)
- return Error(IDLoc, "invalid instruction packet: out of slots");
+ Error(IDLoc, "invalid instruction packet: out of slots");
else if (HexagonShuffler::SHUFFLE_ERROR_SLOTS == Erm)
- return Error(IDLoc, "invalid instruction packet: slot error");
+ Error(IDLoc, "invalid instruction packet: slot error");
else if (HexagonShuffler::SHUFFLE_ERROR_ERRATA2 == Erm)
- return Error(IDLoc, "v60 packet violation");
+ Error(IDLoc, "v60 packet violation");
else if (HexagonShuffler::SHUFFLE_ERROR_STORE_LOAD_CONFLICT == Erm)
- return Error(IDLoc, "slot 0 instruction does not allow slot 1 store");
+ Error(IDLoc, "slot 0 instruction does not allow slot 1 store");
else
- return Error(IDLoc, "unknown error in instruction packet");
+ Error(IDLoc, "unknown error in instruction packet");
}
}
@@ -1511,8 +1508,7 @@
return Match_InvalidOperand;
}
-// FIXME: Calls to OutOfRange shoudl propagate failure up to parseStatement.
-bool HexagonAsmParser::OutOfRange(SMLoc IDLoc, long long Val, long long Max) {
+void HexagonAsmParser::OutOfRange(SMLoc IDLoc, long long Val, long long Max) {
std::string errStr;
raw_string_ostream ES(errStr);
ES << "value " << Val << "(" << format_hex(Val, 0) << ") out of range: ";
@@ -1520,7 +1516,7 @@
ES << "0-" << Max;
else
ES << Max << "-" << (-Max - 1);
- return Parser.printError(IDLoc, ES.str().c_str());
+ Error(IDLoc, ES.str().c_str());
}
int HexagonAsmParser::processInstruction(MCInst &Inst,
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 58562f9..cdbf4a6 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -924,11 +924,9 @@
assert(N == 1 && "Invalid number of operands!");
Inst.addOperand(MCOperand::createReg(getFGR32Reg()));
// FIXME: We ought to do this for -integrated-as without -via-file-asm too.
- // FIXME: This should propagate failure up to parseStatement.
if (!AsmParser.useOddSPReg() && RegIdx.Index & 1)
- AsmParser.getParser().printError(
- StartLoc, "-mno-odd-spreg prohibits the use of odd FPU "
- "registers");
+ AsmParser.Error(StartLoc, "-mno-odd-spreg prohibits the use of odd FPU "
+ "registers");
}
void addFGRH32AsmRegOperands(MCInst &Inst, unsigned N) const {
@@ -1862,7 +1860,7 @@
if (MemOffset < -32768 || MemOffset > 32767) {
// Offset can't exceed 16bit value.
expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), true);
- return getParser().hasPendingError();
+ return false;
}
} else if (Op.isExpr()) {
const MCExpr *Expr = Op.getExpr();
@@ -1872,11 +1870,11 @@
if (SR->getKind() == MCSymbolRefExpr::VK_None) {
// Expand symbol.
expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), false);
- return getParser().hasPendingError();
+ return false;
}
} else if (!isEvaluated(Expr)) {
expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), false);
- return getParser().hasPendingError();
+ return false;
}
}
}
@@ -2468,7 +2466,6 @@
Error(IDLoc, "la used to load 64-bit address");
// Continue as if we had 'dla' instead.
Is32BitAddress = false;
- return true;
}
// dla requires 64-bit addresses.
@@ -2695,9 +2692,9 @@
Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM);
} else {
if (!isInt<17>(Offset.getImm()))
- return Error(IDLoc, "branch target out of range");
+ Error(IDLoc, "branch target out of range");
if (OffsetToAlignment(Offset.getImm(), 1LL << 1))
- return Error(IDLoc, "branch to misaligned address");
+ Error(IDLoc, "branch to misaligned address");
Inst.clear();
Inst.setOpcode(Mips::BEQ_MM);
Inst.addOperand(MCOperand::createReg(Mips::ZERO));
@@ -3305,7 +3302,8 @@
MipsTargetStreamer &TOut = getTargetStreamer();
if (hasMips32r6() || hasMips64r6()) {
- return Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
+ Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
+ return false;
}
warnIfNoMacro(IDLoc);
@@ -3382,8 +3380,10 @@
const MCSubtargetInfo *STI) {
MipsTargetStreamer &TOut = getTargetStreamer();
- if (hasMips32r6() || hasMips64r6())
- return Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
+ if (hasMips32r6() || hasMips64r6()) {
+ Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
+ return false;
+ }
const MCOperand &DstRegOp = Inst.getOperand(0);
assert(DstRegOp.isReg() && "expected register operand kind");
@@ -4817,10 +4817,12 @@
Parser.Lex();
if (parseOperand(Operands, Name)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
if (Parser.getTok().isNot(AsmToken::RParen)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token, expected ')'");
}
Operands.push_back(
@@ -4845,10 +4847,12 @@
Parser.Lex();
if (parseOperand(Operands, Name)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
if (Parser.getTok().isNot(AsmToken::RBrac)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token, expected ']'");
}
Operands.push_back(
@@ -4868,6 +4872,7 @@
// Check if we have valid mnemonic
if (!mnemonicIsValid(Name, 0)) {
+ Parser.eatToEndOfStatement();
return Error(NameLoc, "unknown instruction");
}
// First operand in MCInst is instruction mnemonic.
@@ -4878,6 +4883,7 @@
// Read the first operand.
if (parseOperand(Operands, Name)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
if (getLexer().is(AsmToken::LBrac) && parseBracketSuffix(Name, Operands))
@@ -4889,6 +4895,7 @@
// Parse and remember the operand.
if (parseOperand(Operands, Name)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
// Parse bracket and parenthesis suffixes before we iterate
@@ -4902,6 +4909,7 @@
}
if (getLexer().isNot(AsmToken::EndOfStatement)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
Parser.Lex(); // Consume the EndOfStatement.
@@ -4911,7 +4919,9 @@
// FIXME: Given that these have the same name, these should both be
// consistent on affecting the Parser.
bool MipsAsmParser::reportParseError(Twine ErrorMsg) {
+ MCAsmParser &Parser = getParser();
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, ErrorMsg);
}
@@ -5412,6 +5422,7 @@
MCAsmParser &Parser = getParser();
if (getLexer().isNot(AsmToken::Comma)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, ErrorStr);
}
@@ -5520,6 +5531,7 @@
MipsOperand &FuncRegOpnd = static_cast<MipsOperand &>(*TmpReg[0]);
if (!FuncRegOpnd.isGPRAsmReg()) {
reportParseError(FuncRegOpnd.getStartLoc(), "invalid register");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -5538,6 +5550,7 @@
if (Parser.parseExpression(OffsetExpr) ||
!OffsetExpr->evaluateAsAbsolute(OffsetVal)) {
reportParseError(ExprLoc, "expected save register or stack offset");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -5547,6 +5560,7 @@
MipsOperand &SaveOpnd = static_cast<MipsOperand &>(*TmpReg[0]);
if (!SaveOpnd.isGPRAsmReg()) {
reportParseError(SaveOpnd.getStartLoc(), "invalid register");
+ Parser.eatToEndOfStatement();
return false;
}
Save = SaveOpnd.getGPR32Reg();
@@ -5834,8 +5848,9 @@
AsmToken Tok = Parser.getTok();
// At the moment only identifiers are supported.
if (Tok.isNot(AsmToken::Identifier)) {
- return Error(Parser.getTok().getLoc(),
- "unexpected token, expected identifier");
+ Error(Parser.getTok().getLoc(), "unexpected token, expected identifier");
+ Parser.eatToEndOfStatement();
+ return false;
}
StringRef Option = Tok.getIdentifier();
@@ -5847,8 +5862,9 @@
getTargetStreamer().emitDirectiveOptionPic0();
Parser.Lex();
if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
- return Error(Parser.getTok().getLoc(),
- "unexpected token, expected end of statement");
+ Error(Parser.getTok().getLoc(),
+ "unexpected token, expected end of statement");
+ Parser.eatToEndOfStatement();
}
return false;
}
@@ -5860,8 +5876,9 @@
getTargetStreamer().emitDirectiveOptionPic2();
Parser.Lex();
if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
- return Error(Parser.getTok().getLoc(),
- "unexpected token, expected end of statement");
+ Error(Parser.getTok().getLoc(),
+ "unexpected token, expected end of statement");
+ Parser.eatToEndOfStatement();
}
return false;
}
@@ -5952,7 +5969,8 @@
return false; // parseDirectiveModule has finished successfully.
} else if (Option == "nooddspreg") {
if (!isABI_O32()) {
- return Error(L, "'.module nooddspreg' requires the O32 ABI");
+ Error(L, "'.module nooddspreg' requires the O32 ABI");
+ return false;
}
setModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
@@ -6413,6 +6431,8 @@
if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
Error(Parser.getTok().getLoc(),
"unexpected token, expected end of statement");
+ // Clear line
+ Parser.eatToEndOfStatement();
}
return false;
}
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index 288f3c1..b2003b8 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -84,7 +84,7 @@
return getSTI().getTargetTriple().getArch() == Triple::sparcv9;
}
- bool expandSET(MCInst &Inst, SMLoc IDLoc,
+ void expandSET(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
public:
@@ -466,7 +466,7 @@
} // end namespace
-bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
+void SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions) {
MCOperand MCRegOp = Inst.getOperand(0);
MCOperand MCValOp = Inst.getOperand(1);
@@ -479,8 +479,8 @@
// Allow either a signed or unsigned 32-bit immediate.
if (RawImmValue < -2147483648LL || RawImmValue > 4294967295LL) {
- return Error(IDLoc,
- "set: argument must be between -2147483648 and 4294967295");
+ Error(IDLoc, "set: argument must be between -2147483648 and 4294967295");
+ return;
}
// If the value was expressed as a large unsigned number, that's ok.
@@ -537,7 +537,6 @@
TmpInst.addOperand(MCOperand::createExpr(Expr));
Instructions.push_back(TmpInst);
}
- return false;
}
bool SparcAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
@@ -557,8 +556,7 @@
Instructions.push_back(Inst);
break;
case SP::SET:
- if (expandSET(Inst, IDLoc, Instructions))
- return true;
+ expandSET(Inst, IDLoc, Instructions);
break;
}
@@ -628,11 +626,13 @@
if (getLexer().is(AsmToken::Comma)) {
if (parseBranchModifiers(Operands) != MatchOperand_Success) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token");
}
}
if (parseOperand(Operands, Name) != MatchOperand_Success) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token");
}
@@ -645,12 +645,14 @@
// Parse and remember the operand.
if (parseOperand(Operands, Name) != MatchOperand_Success) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token");
}
}
}
if (getLexer().isNot(AsmToken::EndOfStatement)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token");
}
Parser.Lex(); // Consume the EndOfStatement.
diff --git a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
index 26a427e..8deac72 100644
--- a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
+++ b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
@@ -959,6 +959,7 @@
if (getLexer().isNot(AsmToken::EndOfStatement)) {
// Read the first operand.
if (parseOperand(Operands, Name)) {
+ Parser.eatToEndOfStatement();
return true;
}
@@ -966,11 +967,13 @@
while (getLexer().is(AsmToken::Comma)) {
Parser.Lex();
if (parseOperand(Operands, Name)) {
+ Parser.eatToEndOfStatement();
return true;
}
}
if (getLexer().isNot(AsmToken::EndOfStatement)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
}
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index efad0e2..05fcd2a 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -659,14 +659,20 @@
}
};
- bool Error(SMLoc L, const Twine &Msg, SMRange Range = None,
+ bool Error(SMLoc L, const Twine &Msg,
+ ArrayRef<SMRange> Ranges = None,
bool MatchingInlineAsm = false) {
MCAsmParser &Parser = getParser();
- if (MatchingInlineAsm) {
- Parser.eatToEndOfStatement();
- return false;
- }
- return Parser.Error(L, Msg, Range);
+ if (MatchingInlineAsm) return true;
+ return Parser.Error(L, Msg, Ranges);
+ }
+
+ bool ErrorAndEatStatement(SMLoc L, const Twine &Msg,
+ ArrayRef<SMRange> Ranges = None,
+ bool MatchingInlineAsm = false) {
+ MCAsmParser &Parser = getParser();
+ Parser.eatToEndOfStatement();
+ return Error(L, Msg, Ranges, MatchingInlineAsm);
}
std::nullptr_t ErrorOperand(SMLoc Loc, StringRef Msg) {
@@ -1889,11 +1895,13 @@
if(getLexer().is(AsmToken::Integer)) {
// Parse memory broadcasting ({1to<NUM>}).
if (getLexer().getTok().getIntVal() != 1)
- return !TokError("Expected 1to<NUM> at this point");
+ return !ErrorAndEatStatement(getLexer().getLoc(),
+ "Expected 1to<NUM> at this point");
Parser.Lex(); // Eat "1" of 1to8
if (!getLexer().is(AsmToken::Identifier) ||
!getLexer().getTok().getIdentifier().startswith("to"))
- return !TokError("Expected 1to<NUM> at this point");
+ return !ErrorAndEatStatement(getLexer().getLoc(),
+ "Expected 1to<NUM> at this point");
// Recognize only reasonable suffixes.
const char *BroadcastPrimitive =
StringSwitch<const char*>(getLexer().getTok().getIdentifier())
@@ -1903,10 +1911,12 @@
.Case("to16", "{1to16}")
.Default(nullptr);
if (!BroadcastPrimitive)
- return !TokError("Invalid memory broadcast primitive.");
+ return !ErrorAndEatStatement(getLexer().getLoc(),
+ "Invalid memory broadcast primitive.");
Parser.Lex(); // Eat "toN" of 1toN
if (!getLexer().is(AsmToken::RCurly))
- return !TokError("Expected } at this point");
+ return !ErrorAndEatStatement(getLexer().getLoc(),
+ "Expected } at this point");
Parser.Lex(); // Eat "}"
Operands.push_back(X86Operand::CreateToken(BroadcastPrimitive,
consumedToken));
@@ -1919,7 +1929,8 @@
if (std::unique_ptr<X86Operand> Op = ParseOperand()) {
Operands.push_back(std::move(Op));
if (!getLexer().is(AsmToken::RCurly))
- return !TokError("Expected } at this point");
+ return !ErrorAndEatStatement(getLexer().getLoc(),
+ "Expected } at this point");
Operands.push_back(X86Operand::CreateToken("}", consumeToken()));
// Parse "zeroing non-masked" semantic {z}
@@ -1927,10 +1938,12 @@
Operands.push_back(X86Operand::CreateToken("{z}", consumeToken()));
if (!getLexer().is(AsmToken::Identifier) ||
getLexer().getTok().getIdentifier() != "z")
- return !TokError("Expected z at this point");
+ return !ErrorAndEatStatement(getLexer().getLoc(),
+ "Expected z at this point");
Parser.Lex(); // Eat the z
if (!getLexer().is(AsmToken::RCurly))
- return !TokError("Expected } at this point");
+ return !ErrorAndEatStatement(getLexer().getLoc(),
+ "Expected } at this point");
Parser.Lex(); // Eat the }
}
}
@@ -2274,6 +2287,7 @@
if (!HandleAVX512Operand(Operands, *Operands.back()))
return true;
} else {
+ Parser.eatToEndOfStatement();
return true;
}
// check for comma and eat it
@@ -2289,7 +2303,8 @@
isParsingIntelSyntax() && isParsingInlineAsm() &&
(getLexer().is(AsmToken::LCurly) || getLexer().is(AsmToken::RCurly));
if (getLexer().isNot(AsmToken::EndOfStatement) && !CurlyAsEndOfStatement)
- return TokError("unexpected token in argument list");
+ return ErrorAndEatStatement(getLexer().getLoc(),
+ "unexpected token in argument list");
}
// Consume the EndOfStatement or the prefix separator Slash
@@ -2555,6 +2570,7 @@
bool X86AsmParser::ErrorMissingFeature(SMLoc IDLoc, uint64_t ErrorInfo,
bool MatchingInlineAsm) {
assert(ErrorInfo && "Unknown missing feature!");
+ ArrayRef<SMRange> EmptyRanges = None;
SmallString<126> Msg;
raw_svector_ostream OS(Msg);
OS << "instruction requires:";
@@ -2564,7 +2580,7 @@
OS << ' ' << getSubtargetFeatureName(ErrorInfo & Mask);
Mask <<= 1;
}
- return Error(IDLoc, OS.str(), SMRange(), MatchingInlineAsm);
+ return Error(IDLoc, OS.str(), EmptyRanges, MatchingInlineAsm);
}
bool X86AsmParser::MatchAndEmitATTInstruction(SMLoc IDLoc, unsigned &Opcode,
@@ -2575,7 +2591,7 @@
assert(!Operands.empty() && "Unexpect empty operand list!");
X86Operand &Op = static_cast<X86Operand &>(*Operands[0]);
assert(Op.isToken() && "Leading operand should always be a mnemonic!");
- SMRange EmptyRange = None;
+ ArrayRef<SMRange> EmptyRanges = None;
// First, handle aliases that expand to multiple instructions.
MatchFPUWaitAlias(IDLoc, Op, Operands, Out, MatchingInlineAsm);
@@ -2682,7 +2698,7 @@
OS << "'" << Base << MatchChars[i] << "'";
}
OS << ")";
- Error(IDLoc, OS.str(), EmptyRange, MatchingInlineAsm);
+ Error(IDLoc, OS.str(), EmptyRanges, MatchingInlineAsm);
return true;
}
@@ -2692,15 +2708,17 @@
// mnemonic was invalid.
if (std::count(std::begin(Match), std::end(Match), Match_MnemonicFail) == 4) {
if (!WasOriginallyInvalidOperand) {
+ SMRange OpRange = Op.getLocRange();
+ ArrayRef<SMRange> Ranges = MatchingInlineAsm ? EmptyRanges : OpRange;
return Error(IDLoc, "invalid instruction mnemonic '" + Base + "'",
- Op.getLocRange(), MatchingInlineAsm);
+ Ranges, MatchingInlineAsm);
}
// Recover location info for the operand if we know which was the problem.
if (ErrorInfo != ~0ULL) {
if (ErrorInfo >= Operands.size())
- return Error(IDLoc, "too few operands for instruction", EmptyRange,
- MatchingInlineAsm);
+ return Error(IDLoc, "too few operands for instruction",
+ EmptyRanges, MatchingInlineAsm);
X86Operand &Operand = (X86Operand &)*Operands[ErrorInfo];
if (Operand.getStartLoc().isValid()) {
@@ -2710,7 +2728,7 @@
}
}
- return Error(IDLoc, "invalid operand for instruction", EmptyRange,
+ return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
MatchingInlineAsm);
}
@@ -2727,13 +2745,13 @@
// operand failure.
if (std::count(std::begin(Match), std::end(Match),
Match_InvalidOperand) == 1) {
- return Error(IDLoc, "invalid operand for instruction", EmptyRange,
+ return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
MatchingInlineAsm);
}
// If all of these were an outright failure, report it in a useless way.
Error(IDLoc, "unknown use of instruction mnemonic without a size suffix",
- EmptyRange, MatchingInlineAsm);
+ EmptyRanges, MatchingInlineAsm);
return true;
}
@@ -2746,7 +2764,7 @@
X86Operand &Op = static_cast<X86Operand &>(*Operands[0]);
assert(Op.isToken() && "Leading operand should always be a mnemonic!");
StringRef Mnemonic = Op.getToken();
- SMRange EmptyRange = None;
+ ArrayRef<SMRange> EmptyRanges = None;
// First, handle aliases that expand to multiple instructions.
MatchFPUWaitAlias(IDLoc, Op, Operands, Out, MatchingInlineAsm);
@@ -2818,8 +2836,10 @@
// If it's a bad mnemonic, all results will be the same.
if (Match.back() == Match_MnemonicFail) {
+ ArrayRef<SMRange> Ranges =
+ MatchingInlineAsm ? EmptyRanges : Op.getLocRange();
return Error(IDLoc, "invalid instruction mnemonic '" + Mnemonic + "'",
- Op.getLocRange(), MatchingInlineAsm);
+ Ranges, MatchingInlineAsm);
}
// If exactly one matched, then we treat that as a successful match (and the
@@ -2842,9 +2862,11 @@
} else if (NumSuccessfulMatches > 1) {
assert(UnsizedMemOp &&
"multiple matches only possible with unsized memory operands");
+ SMRange OpRange = UnsizedMemOp->getLocRange();
+ ArrayRef<SMRange> Ranges = MatchingInlineAsm ? EmptyRanges : OpRange;
return Error(UnsizedMemOp->getStartLoc(),
"ambiguous operand size for instruction '" + Mnemonic + "\'",
- UnsizedMemOp->getLocRange(), MatchingInlineAsm);
+ Ranges, MatchingInlineAsm);
}
// If one instruction matched with a missing feature, report this as a
@@ -2860,12 +2882,12 @@
// operand failure.
if (std::count(std::begin(Match), std::end(Match),
Match_InvalidOperand) == 1) {
- return Error(IDLoc, "invalid operand for instruction", EmptyRange,
+ return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
MatchingInlineAsm);
}
// If all of these were an outright failure, report it in a useless way.
- return Error(IDLoc, "unknown instruction mnemonic", EmptyRange,
+ return Error(IDLoc, "unknown instruction mnemonic", EmptyRanges,
MatchingInlineAsm);
}