ARM STRT assembly parsing and encoding.
llvm-svn: 137372
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 240293a..201ccf8 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -945,8 +945,8 @@
case ARM::STR_POST_REG:
case ARM::STRB_POST_IMM:
case ARM::STRB_POST_REG:
- case ARM::STRTr:
- case ARM::STRTi:
+ case ARM::STRT_POST_REG:
+ case ARM::STRT_POST_IMM:
case ARM::STRBT_POST_REG:
case ARM::STRBT_POST_IMM:
if (!DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)) return false;