define the DFPBinOp class
llvm-svn: 30981
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 6499692..cacff85 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -56,6 +56,11 @@
!strconcat(OpcStr, " $dst, $a, $b"),
[(set FPRegs:$dst, (OpNode FPRegs:$a, FPRegs:$b))]>;
+class DFPBinOp<string OpcStr, SDNode OpNode> :
+ InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b),
+ !strconcat(OpcStr, " $dst, $a, $b"),
+ [(set DFPRegs:$dst, (OpNode DFPRegs:$a, DFPRegs:$b))]>;
+
class Addr1BinOp<string OpcStr, SDNode OpNode> :
InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b),
!strconcat(OpcStr, " $dst, $a, $b"),
@@ -256,17 +261,10 @@
def FMSTAT : InstARM<(ops ), "fmstat", [(armfmstat)]>;
// Floating Point Arithmetic
-def FADDS : FPBinOp<"fadds", fadd>;
-
-def FADDD : InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b),
- "faddd $dst, $a, $b",
- [(set DFPRegs:$dst, (fadd DFPRegs:$a, DFPRegs:$b))]>;
-
-def FSUBS : FPBinOp<"fsubs", fsub>;
-
-def FSUBD : InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b),
- "fsubd $dst, $a, $b",
- [(set DFPRegs:$dst, (fsub DFPRegs:$a, DFPRegs:$b))]>;
+def FADDS : FPBinOp<"fadds", fadd>;
+def FADDD : DFPBinOp<"faddd", fadd>;
+def FSUBS : FPBinOp<"fsubs", fsub>;
+def FSUBD : DFPBinOp<"fsubd", fsub>;
def FNEGS : InstARM<(ops FPRegs:$dst, FPRegs:$src),
"fnegs $dst, $src",
@@ -277,10 +275,7 @@
[(set DFPRegs:$dst, (fneg DFPRegs:$src))]>;
def FMULS : FPBinOp<"fmuls", fmul>;
-
-def FMULD : InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b),
- "fmuld $dst, $a, $b",
- [(set DFPRegs:$dst, (fmul DFPRegs:$a, DFPRegs:$b))]>;
+def FMULD : DFPBinOp<"fmuld", fmul>;
// Floating Point Load