| commit | e3547af7bedf5cf01cbfd38f18e7a37dda430e7f | [log] [tgz] |
|---|---|---|
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | Sun Mar 25 10:21:19 2018 +0000 |
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | Sun Mar 25 10:21:19 2018 +0000 |
| tree | 765ebac45e27b6e40e100a27ddcd0cd0f85f07e4 | |
| parent | 98acdde59a4697f8359548d8e02a6aa7df9b324e [diff] |
[X86] Add the ability to override memory folding latency to schedules and add 1uop for memory folds for Intel models The Intel models need an extra 1uop for memory folded instructions, plus a lot of instructions take a non-default memory latency which should allow us to use the multiclass a lot more to tidy things up. Differential Revision: https://reviews.llvm.org/D44840 llvm-svn: 328446