fix 'the the '; NFC
llvm-svn: 254928
diff --git a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
index 6405082..a8622a9 100644
--- a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
+++ b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
@@ -1592,7 +1592,7 @@
// not use the other opcode as it is a legacy artifact of TD files.
int64_t Value;
if (MO.getExpr()->evaluateAsAbsolute(Value)) {
- // if the the operand can fit within a 7:2 field
+ // if the operand can fit within a 7:2 field
if (Value < (1 << 8) && Value >= -(1 << 8)) {
SMLoc myLoc = Operands[2]->getStartLoc();
// # is left in startLoc in the case of ##
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index 3dc4933..2862468 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -1475,7 +1475,7 @@
}
-// Return true if the the instruction is a compund branch instruction.
+// Return true if the instruction is a compund branch instruction.
bool HexagonInstrInfo::isCompoundBranchInstr(const MachineInstr *MI) const {
return (getType(MI) == HexagonII::TypeCOMPOUND && MI->isBranch());
}