[X86] Remove checks for FeatureAVX512 from the X86 assembly parser. Remove mcpu/mattr from assembly test command lines.
Summary:
We should always be able to accept AVX512 registers and instructions in llvm-mc. The only subtarget mode that should be checked is 16-bit vs 32-bit vs 64-bit mode.
I've also removed all the mattr/mcpu lines from test RUN lines to be consistent with this. Most were due to AVX512, but a few were for other features.
Fixes PR36202
Reviewers: RKSimon, echristo, bkramer
Reviewed By: echristo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42824
llvm-svn: 324106
diff --git a/llvm/test/MC/X86/intel-syntax-avx512-error.s b/llvm/test/MC/X86/intel-syntax-avx512-error.s
index 6e9925f..3454e37 100644
--- a/llvm/test/MC/X86/intel-syntax-avx512-error.s
+++ b/llvm/test/MC/X86/intel-syntax-avx512-error.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc %s -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512f -x86-asm-syntax=intel -output-asm-variant=1 -o /dev/null 2>&1 | FileCheck %s
+// RUN: not llvm-mc %s -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 -o /dev/null 2>&1 | FileCheck %s
// Validate that only OpMask/Zero mark may immediately follow destination
vfmsub213ps zmm8{rn-sae} {k2}, zmm8, zmm8