commit e682b80b8bf410abd9ee1040a643fd4e31413fa2
author Strahinja Petrovic <strahinja.petrovic@rt-rk.com> Mon May 09 12:27:39 2016 +0000
committer Strahinja Petrovic <strahinja.petrovic@rt-rk.com> Mon May 09 12:27:39 2016 +0000
tree 7eb75f248c9cdb53b553e7748544d96b3b8c1116
parent e3b8645a1c223237a099243205c1b0b2e587569d

[PowerPC] fix register alignment for long double type

This patch fixes register alignment for long double type in
soft float mode. Before this patch alignment was 8 and this
patch changes it to 4.
Differential Revision: http://reviews.llvm.org/D18034

llvm-svn: 268909

llvm/lib/Target/PowerPC/PPCFastISel.cpp

diff --git a/llvm/lib/Target/PowerPC/PPCFastISel.cpp b/llvm/lib/Target/PowerPC/PPCFastISel.cpp
index 7ff7e48..cccc75f 100644
--- a/llvm/lib/Target/PowerPC/PPCFastISel.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFastISel.cpp
@@ -16,6 +16,7 @@
 #include "PPC.h"
 #include "MCTargetDesc/PPCPredicates.h"
 #include "PPCCallingConv.h"
+#include "PPCCCState.h"
 #include "PPCISelLowering.h"
 #include "PPCMachineFunctionInfo.h"
 #include "PPCSubtarget.h"