commit e7b64dcc1e1f8e20001ba6bf65b38e3df367647c
author Eric Christopher <echristo@apple.com> Wed May 26 00:02:12 2010 +0000
committer Eric Christopher <echristo@apple.com> Wed May 26 00:02:12 2010 +0000
tree 0f3025d9be003cf3d5a6aac341a1cff3809260f0
parent 66c939a2ca5d5f6176ccd014f3a946a814b87d12

Start adding mach-o tls reloc support.

llvm-svn: 104651

llvm/include/llvm/MC/MCExpr.h

diff --git a/llvm/include/llvm/MC/MCExpr.h b/llvm/include/llvm/MC/MCExpr.h
index bb8f2bb..1f9b8f2 100644
--- a/llvm/include/llvm/MC/MCExpr.h
+++ b/llvm/include/llvm/MC/MCExpr.h
@@ -136,7 +136,8 @@
     VK_TLSGD,
     VK_TPOFF,
     VK_ARM_HI16, // The R_ARM_MOVT_ABS relocation (:upper16: in the asm file)
-    VK_ARM_LO16 // The R_ARM_MOVW_ABS_NC relocation (:lower16: in the asm file)
+    VK_ARM_LO16, // The R_ARM_MOVW_ABS_NC relocation (:lower16: in the asm file)
+    VK_TLVP // Mach-O thread local variable relocation
   };
 
 private:

llvm/lib/MC/MCExpr.cpp

diff --git a/llvm/lib/MC/MCExpr.cpp b/llvm/lib/MC/MCExpr.cpp
index 068ca81..c000dd7 100644
--- a/llvm/lib/MC/MCExpr.cpp
+++ b/llvm/lib/MC/MCExpr.cpp
@@ -177,6 +177,7 @@
   case VK_TPOFF: return "TPOFF";
   case VK_ARM_HI16: return ":upper16:";
   case VK_ARM_LO16: return ":lower16:";
+  case VK_TLVP: return "TLVP";
   }
 }
 
@@ -192,6 +193,7 @@
     .Case("PLT", VK_PLT)
     .Case("TLSGD", VK_TLSGD)
     .Case("TPOFF", VK_TPOFF)
+    .Case("TLVP", VK_TLVP)
     .Default(VK_Invalid);
 }
 

llvm/lib/MC/MachObjectWriter.cpp

diff --git a/llvm/lib/MC/MachObjectWriter.cpp b/llvm/lib/MC/MachObjectWriter.cpp
index 9bcb93e..fc742e4 100644
--- a/llvm/lib/MC/MachObjectWriter.cpp
+++ b/llvm/lib/MC/MachObjectWriter.cpp
@@ -145,7 +145,8 @@
     RIT_Pair                = 1,
     RIT_Difference          = 2,
     RIT_PreboundLazyPointer = 3,
-    RIT_LocalDifference     = 4
+    RIT_LocalDifference     = 4,
+    RIT_TLV                 = 5
   };
 
   /// X86_64 uses its own relocation types.
@@ -158,7 +159,8 @@
     RIT_X86_64_Subtractor = 5,
     RIT_X86_64_Signed1    = 6,
     RIT_X86_64_Signed2    = 7,
-    RIT_X86_64_Signed4    = 8
+    RIT_X86_64_Signed4    = 8,
+    RIT_X86_64_TLV        = 9
   };
 
   /// MachSymbolData - Helper struct for containing some precomputed information
@@ -610,6 +612,8 @@
               Type = RIT_X86_64_GOT;
           } else if (Modifier != MCSymbolRefExpr::VK_None) {
             report_fatal_error("unsupported symbol modifier in relocation");
+          } else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
+            Type = RIT_X86_64_TLV;
           } else {
             Type = RIT_X86_64_Signed;
 
@@ -650,6 +654,8 @@
           // required to include any necessary offset directly.
           Type = RIT_X86_64_GOT;
           IsPCRel = 1;
+        } else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
+          report_fatal_error("TLVP symbol modifier should have been rip-rel");
         } else if (Modifier != MCSymbolRefExpr::VK_None)
           report_fatal_error("unsupported symbol modifier in relocation");
         else