commit e7ec3bc7bca308e1620916ac2d6d27463d062aa0
author Anton Korobeynikov <asl@math.spbu.ru> Tue Mar 06 08:12:33 2007 +0000
committer Anton Korobeynikov <asl@math.spbu.ru> Tue Mar 06 08:12:33 2007 +0000
tree d51b30939540704bf9c200d57df6c994e87aa080
parent 70c3c66e38dfe0cf86c46e7d890616a810fbdd4c

Use new SDIselParamAttr enumeration. This removes "magick" constants
from formal attributes' flags processing.

llvm-svn: 34963

llvm/lib/Target/ARM/ARMISelLowering.cpp

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index f573198..88c6ad0 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -27,6 +27,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/ADT/VectorExtras.h"
@@ -346,7 +347,7 @@
   NeededGPRs = 0;
   StackPad = 0;
   GPRPad = 0;
-  unsigned align = (Flags >> 27);
+  unsigned align = (Flags >> SDISelParamFlags::OrigAlignmentOffs);
   GPRPad = NumGPRs % ((align + 3)/4);
   StackPad = StackOffset % align;
   unsigned firstGPR = NumGPRs + GPRPad;

llvm/lib/Target/TargetCallingConv.td

diff --git a/llvm/lib/Target/TargetCallingConv.td b/llvm/lib/Target/TargetCallingConv.td
index edcd6dd..3f71a1d 100644
--- a/llvm/lib/Target/TargetCallingConv.td
+++ b/llvm/lib/Target/TargetCallingConv.td
@@ -38,7 +38,7 @@
 
 /// CCIfInReg - If this argument is marked with the 'inreg' attribute, apply
 /// the specified action.
-class CCIfInReg<CCAction A> : CCIf<"ArgFlags & 2", A> {}
+class CCIfInReg<CCAction A> : CCIf<"ArgFlags & SDISelParamFlags::InReg", A> {}
 
 
 /// CCAssignToReg - This action matches if there is a register in the specified

llvm/lib/Target/X86/X86ISelLowering.cpp

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c0c7b79..5502cdc 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -29,6 +29,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Target/TargetOptions.h"
@@ -665,10 +666,12 @@
     BytesToPopOnReturn  = StackSize;    // Callee pops everything..
     BytesCallerReserves = 0;
   } else {
-    BytesToPopOnReturn  = 0; // Callee pops hidden struct pointer.
+    BytesToPopOnReturn  = 0; // Callee pops nothing.
     
     // If this is an sret function, the return should pop the hidden pointer.
-    if (NumArgs && (cast<ConstantSDNode>(Op.getOperand(3))->getValue() & 4))
+    if (NumArgs &&
+        (cast<ConstantSDNode>(Op.getOperand(3))->getValue() &
+         SDISelParamFlags::StructReturn))
       BytesToPopOnReturn = 4;  
     
     BytesCallerReserves = StackSize;
@@ -740,7 +743,9 @@
   }
 
   // If the first argument is an sret pointer, remember it.
-  bool isSRet = NumOps &&(cast<ConstantSDNode>(Op.getOperand(6))->getValue()&4);
+  bool isSRet = NumOps &&
+    (cast<ConstantSDNode>(Op.getOperand(6))->getValue() &
+     SDISelParamFlags::StructReturn);
   
   if (!MemOpChains.empty())
     Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,