commit e8436e8631540850f39ca5cb1f3d5a361ea714ab
author Peter Collingbourne <peter@pcc.me.uk> Tue Feb 27 19:00:59 2018 +0000
committer Peter Collingbourne <peter@pcc.me.uk> Tue Feb 27 19:00:59 2018 +0000
tree 7049485da69589bce3e24427887ad0f786ad4663
parent c0a12914785ded3f203401715e6e9616f8985619

ARM: Don't rewrite add reg, $sp, 0 -> mov reg, $sp if the add defines CPSR.

Differential Revision: https://reviews.llvm.org/D43807

llvm-svn: 326226

llvm/lib/Target/ARM/Thumb2InstrInfo.cpp

diff --git a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
index e8259f7..179f113 100644
--- a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -489,7 +489,8 @@
     Offset += MI.getOperand(FrameRegIdx+1).getImm();
 
     unsigned PredReg;
-    if (Offset == 0 && getInstrPredicate(MI, PredReg) == ARMCC::AL) {
+    if (Offset == 0 && getInstrPredicate(MI, PredReg) == ARMCC::AL &&
+        !MI.definesRegister(ARM::CPSR)) {
       // Turn it into a move.
       MI.setDesc(TII.get(ARM::tMOVr));
       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);