commit e91802f33624f8e747f4128d5ad1dae2bb5d0da3
author Yonghong Song <yhs@fb.com> Tue Mar 13 06:47:06 2018 +0000
committer Yonghong Song <yhs@fb.com> Tue Mar 13 06:47:06 2018 +0000
tree 7c4398076a38e222d74b257b90bc6f84889ef9c7
parent 80b882ecc565ae8b27dd6a61f37d74a0aef7e959

bpf: New post-RA peephole optimization pass to eliminate bad RA codegen

This new pass eliminate identical move:

  MOV rA, rA

This is particularly possible to happen when sub-register support
enabled. The special type cast insn MOV_32_64 involves different
register class on src (i32) and dst (i64), RA could generate useless
instruction due to this.

This pass also could serve as the bast for further post-RA optimization.

Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 327370

llvm/lib/Target/BPF/BPFTargetMachine.cpp

diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.cpp b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
index 91ff64b..84d89bf 100644
--- a/llvm/lib/Target/BPF/BPFTargetMachine.cpp
+++ b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
@@ -86,6 +86,7 @@
 
   bool addInstSelector() override;
   void addMachineSSAOptimization() override;
+  void addPreEmitPass() override;
 };
 }
 
@@ -110,3 +111,11 @@
   if (Subtarget->getHasAlu32() && !DisableMIPeephole)
     addPass(createBPFMIPeepholePass());
 }
+
+void BPFPassConfig::addPreEmitPass() {
+  const BPFSubtarget *Subtarget = getBPFTargetMachine().getSubtargetImpl();
+
+  if (getOptLevel() != CodeGenOpt::None)
+    if (Subtarget->getHasAlu32() && !DisableMIPeephole)
+      addPass(createBPFMIPreEmitPeepholePass());
+}