commit e9384eb13bc8d47377d7e2dd2ea9c2817f70d743
author Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> Mon Apr 30 12:05:34 2018 +0000
committer Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> Mon Apr 30 12:05:34 2018 +0000
tree 4efb10ace9eab1b688563c35f17075fad51af21d
parent c53400156b19d94add599865656af1ed0d359011

[llvm-mca] Support for in-order CPU for -instruction-tables testing.

Added Intel Atom tests to verify that the tool correctly generates instruction
tables even if the CPU is in-order.

Fixes PR37282.

llvm-svn: 331169

llvm/tools/llvm-mca/llvm-mca.cpp

diff --git a/llvm/tools/llvm-mca/llvm-mca.cpp b/llvm/tools/llvm-mca/llvm-mca.cpp
index 423f852..14be435 100644
--- a/llvm/tools/llvm-mca/llvm-mca.cpp
+++ b/llvm/tools/llvm-mca/llvm-mca.cpp
@@ -349,7 +349,7 @@
   if (!STI->isCPUStringValid(MCPU))
     return 1;
 
-  if (!STI->getSchedModel().isOutOfOrder()) {
+  if (!PrintInstructionTables && !STI->getSchedModel().isOutOfOrder()) {
     WithColor::error() << "please specify an out-of-order cpu. '" << MCPU
                        << "' is an in-order cpu.\n";
     return 1;