R600: Add intrinsics for mad24
llvm-svn: 209456
diff --git a/llvm/lib/Target/R600/CaymanInstructions.td b/llvm/lib/Target/R600/CaymanInstructions.td
index 837d602..6dded24c 100644
--- a/llvm/lib/Target/R600/CaymanInstructions.td
+++ b/llvm/lib/Target/R600/CaymanInstructions.td
@@ -21,12 +21,14 @@
let Predicates = [isCayman] in {
def MULADD_INT24_cm : R600_3OP <0x08, "MULADD_INT24",
- [(set i32:$dst, (add (AMDGPUmul_i24 i32:$src0, i32:$src1), i32:$src2))], VecALU
+ [(set i32:$dst, (AMDGPUmad_i24 i32:$src0, i32:$src1, i32:$src2))], VecALU
>;
def MUL_INT24_cm : R600_2OP <0x5B, "MUL_INT24",
[(set i32:$dst, (AMDGPUmul_i24 i32:$src0, i32:$src1))], VecALU
>;
+def : IMad24Pat<MULADD_INT24_cm>;
+
let isVector = 1 in {
def RECIP_IEEE_cm : RECIP_IEEE_Common<0x86>;