commit ebbd6e49768271297d17bcecd22eae2128e24e26
author Matt Arsenault <Matthew.Arsenault@amd.com> Mon Sep 09 16:02:07 2019 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Mon Sep 09 16:02:07 2019 +0000
tree 26eec1b36481602683fafa9cd7c3654aa3a1e7f9
parent c34b4036ffe115c7cc03b9236922e98b78adb8b1

AMDGPU: Remove code address space predicates

Fixes 8-byte, 8-byte aligned LDS loads. 16-byte case still broken due
to not be reported as legal.

llvm-svn: 371413

llvm/utils/TableGen/CodeGenDAGPatterns.cpp

diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
index c301860..07fffae 100644
--- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -919,6 +919,7 @@
 
   if (isAtomic()) {
     if (getMemoryVT() == nullptr && !isAtomicOrderingMonotonic() &&
+        getAddressSpaces() == nullptr &&
         !isAtomicOrderingAcquire() && !isAtomicOrderingRelease() &&
         !isAtomicOrderingAcquireRelease() &&
         !isAtomicOrderingSequentiallyConsistent() &&